Low-Complexity Digit-Serial Multiplier Over $GF(2^{m})$ Based on Efficient Toeplitz Block Toeplitz Matrix–Vector Product Decomposition
Year
: 2017DOI: 10.1109/TVLSI.2016.2605183
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Low-Complexity Digit-Serial Multiplier Over $GF(2^{m})$ Based on Efficient Toeplitz Block Toeplitz Matrix–Vector Product Decomposition
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| contributor author | Chiou-Yng Lee | |
| contributor author | Pramod Kumar Meher | |
| contributor author | Chia-Chen Fan | |
| contributor author | Shyan-Ming Yuan | |
| date accessioned | 2020-03-15T09:12:08Z | |
| date available | 2020-03-15T09:12:08Z | |
| date issued | 2017 | |
| identifier other | YtHSMfS5SDWb808XmGIwl8B16u_uROsNkVkSPt_mmDD9trW2PJ.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/1903229 | |
| format | general | |
| language | English | |
| title | Low-Complexity Digit-Serial Multiplier Over $GF(2^{m})$ Based on Efficient Toeplitz Block Toeplitz Matrix–Vector Product Decomposition | |
| type | Journal Paper | |
| contenttype | Fulltext | |
| contenttype | Fulltext | |
| identifier padid | 13333252 | |
| identifier doi | 10.1109/TVLSI.2016.2605183 | |
| journal title | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | |
| coverage | Academic | |
| pages | 735-746 | |
| journal volume | 25 | |
| journal issue | 2 | |
| filesize | 1791300 | |
| citations | 1 |