A 7.9-fJ/conversion-step 8-b 400-MS/s 2-b-per-cycle SAR ADC with A preset capacitive DAC
| contributor author | Jixuan Xiang | |
| contributor author | Jian Mei | |
| contributor author | Hao Chang | |
| contributor author | Fan Ye | |
| date accessioned | 2020-03-14T07:58:25Z | |
| date available | 2020-03-14T07:58:25Z | |
| date issued | 2013 | |
| identifier other | RZgtCKR7ufUCgVio2zPGRSROjDRVv88qrzoxFGz4Xzaql0vTFs.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/1586456?show=full | |
| format | general | |
| language | English | |
| title | A 7.9-fJ/conversion-step 8-b 400-MS/s 2-b-per-cycle SAR ADC with A preset capacitive DAC | |
| type | Journal Paper | |
| contenttype | Fulltext | |
| contenttype | Fulltext | |
| identifier padid | 11514137 | |
| identifier doi | 10.1109/ASICON.2013.6812049 | |
| journal title | 2013 IEEE 10th International Conference on ASIC | |
| coverage | Academic | |
| filesize | 339126 | |
| citations | 1 |