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On the Origin of Anomalous Off–Current Under Hot Carrier Stress in p-Channel DDDMOS Transistors With STI Structure

contributor authorChing-En Chen
contributor authorTing-Chang Chang
contributor authorHua-Mao Chen
contributor authorBo You
contributor authorKai-Hsiang Yang
contributor authorSzu-Han Ho
contributor authorJyun-Yu Tsai
contributor authorKuan-Ju Liu
contributor authorYing-Hsin Lu
contributor authorYu-Ju Hung
contributor authorYa-Hsiang Tai
contributor authorTseung-Yuen Tseng
date accessioned2020-03-13T00:00:10Z
date available2020-03-13T00:00:10Z
date issued2014
identifier issn0741-3106
identifier other6805192.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/1130954?show=full
formatgeneral
languageEnglish
publisherIEEE
titleOn the Origin of Anomalous Off–Current Under Hot Carrier Stress in p-Channel DDDMOS Transistors With STI Structure
typeJournal Paper
contenttypeMetadata Only
identifier padid8311613
subject keywordsMOSFET
subject keywordselectric fields
subject keywordselectron traps
subject keywordshot carriers
subject keywordsHCS
subject keywordsHVNW
subject keywordsISE-TCAD simulation
subject keywordsOFF-current conductive path
subject keywordsSTI structure
subject keywordsanomalous off-current
subject keywordscharge pumping measurements
subject keywordsdouble diffused drain metal-oxide-semiconductor transistors
subject keywordsdrain-side corners
subject keywordselectric field
subject keywordselectron trapping
subject keywordshigh-voltage n-well
subject keywordshot carrier stress
subject keywordsliner oxide layer interface
subject keywordsnitride layer interface
subject keywordsoperation conditions
subject keywordsp-channel DDDMOS transistors
subject keywordsshallow trench isolation structure
subject keywordsCharge carrier pro
identifier doi10.1109/LED.2014.2316316
journal titleElectron Device Letters, IEEE
journal volume35
journal issue6
filesize1277427
citations0


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