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Technological parameters scaling influence on the analog performance of Graded-Channel SOI nMOSFET transistors

contributor authorAssalti, R.
contributor authorPavanello, M.A.
contributor authorde Souza, M.
contributor authorFlandre, D.
date accessioned2020-03-12T22:35:52Z
date available2020-03-12T22:35:52Z
date issued2014
identifier other7016159.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/1088282?show=full
formatgeneral
languageEnglish
publisherIEEE
titleTechnological parameters scaling influence on the analog performance of Graded-Channel SOI nMOSFET transistors
typeConference Paper
contenttypeMetadata Only
identifier padid8226293
subject keywordscompensation
subject keywordsn delay systems
subject keywordsn gait analysis
subject keywordsn mobile robots
subject keywordsn numerical analysis
subject keywordsn robot dynamics
subject keywordsn stability
subject keywordsn biped walking robot
subject keywordsn control strategy
subject keywordsn elastic potential energy
subject keywordsn energy compensation process
subject keywordsn energy efficiency
subject keywordsn gait evolution character
subject keywordsn level ground
subject keywordsn numerical simulation
subject keywordsn passive dynamic walking
subject keywordsn simple biped walking method
subject keywordsn small time delay
subject keywordsn stability
subject keywordsn time delay control
subject keywordsn walking performance
subject keywordsn walking spe
identifier doi10.1109/ChiCC.2014.6896336
journal titleevices, Circuits and Systems (ICCDCS), 2014 International Caribbean Conference on
filesize767269
citations0


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