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Design of a low power NoC router using Marching Memory Through type

contributor authorYasudo, Ryota
contributor authorKagami, Takahiro
contributor authorAmano, Hideharu
contributor authorNakase, Yasunobu
contributor authorWatanabe, Masashi
contributor authorOishi, Tsukasa
contributor authorShimizu, Toru
contributor authorNakamura, Tadao
date accessioned2020-03-12T22:25:51Z
date available2020-03-12T22:25:51Z
date issued2014
identifier other7008769.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/1082763?show=full
formatgeneral
languageEnglish
publisherIEEE
titleDesign of a low power NoC router using Marching Memory Through type
typeConference Paper
contenttypeMetadata Only
identifier padid8219373
subject keywordsintegrated optoelectronics
subject keywordsn liquid crystal on silicon
subject keywordsn microprocessor chips
subject keywordsn wavelength division multiplexing
subject keywordsn LCoS
subject keywordsn industrial applications
subject keywordsn manufacturing applications
subject keywordsn programmable optical processing technology
subject keywordsn programmable optical processors
subject keywordsn Fiber nonlinear optics
subject keywordsn Optical attenuators
subject keywordsn Optical fibers
subject keywordsn Optical polarization
subject keywordsn Optical pulse shaping
identifier doi10.1109/OFC.2014.6887188
journal titleetworks-on-Chip (NoCS), 2014 Eighth IEEE/ACM International Symposium on
filesize1058503
citations0


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