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A many-core hardware acceleration platform for short read mapping problem using distributed memory interface with 3D-stacked architecture

contributor authorLiu, Pei
contributor authorHemani, Ahmed
contributor authorPaul, Kolin
date accessioned2020-03-12T22:02:08Z
date available2020-03-12T22:02:08Z
date issued2014
identifier other6972452.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/1069145?show=full
formatgeneral
languageEnglish
publisherIEEE
titleA many-core hardware acceleration platform for short read mapping problem using distributed memory interface with 3D-stacked architecture
typeConference Paper
contenttypeMetadata Only
identifier padid8204402
subject keywordsbattery powered vehicles
subject keywordsn fuel cell vehicles
subject keywordsn hybrid electric vehicles
subject keywordsn motorcycles
subject keywordsn supercapacitors
subject keywordsn electric drive
subject keywordsn fuel cell triple hybrid drive train
subject keywordsn hydrogen fuel cell hybrid system
subject keywordsn load cycle energy
subject keywordsn motorcycle traffic
subject keywordsn pure battery electric motorcycles
subject keywordsn ultracapacitor
subject keywordsn Acceleration
subject keywordsn Batteries
subject keywordsn Capacitors
subject keywordsn Fuel cells
subject keywordsn Hybrid power systems
subject keywordsn Hydrogen
subject keywordsn Motorcycles
subject keywordsn Electric vehicle
subject keywordsn Fuel Cell Vehicle
subject keywordsn Hybrid
identifier doi10.1109/EVER.2014.6844118
journal titleystem-on-Chip (SoC), 2014 International Symposium on
filesize311601
citations0


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