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Optimal TCSC allocation in a power system for risk minimization

contributor authorShchetinin, Dmitry
contributor authorHug, Gabriela
date accessioned2020-03-12T21:55:11Z
date available2020-03-12T21:55:11Z
date issued2014
identifier other6965383.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/1065121?show=full
formatgeneral
languageEnglish
publisherIEEE
titleOptimal TCSC allocation in a power system for risk minimization
typeConference Paper
contenttypeMetadata Only
identifier padid8198422
subject keywordsCMOS integrated circuits
subject keywordsn amplifiers
subject keywordsn analogue-digital conversion
subject keywordsn bootstrap circuits
subject keywordsn low-power electronics
subject keywordsn CMOS
subject keywordsn ERBW
subject keywordsn Nyquist bandwidth
subject keywordsn bootstrapped switches
subject keywordsn building block
subject keywordsn effective resolution bandwidth
subject keywordsn frequency 250 Hz
subject keywordsn low-power applications
subject keywordsn low-voltage amplifier
subject keywordsn power 17 nW
subject keywordsn rail-to-rail SAR ADC
subject keywordsn rail-to-rail signal swing
subject keywordsn signal-to-noise-and-distortion ratio
subject keywordsn size 0.18 mum
subject keywordsn successive approximation registe
identifier doi10.1109/VLSI-DAT.2014.6834905
journal titleorth American Power Symposium (NAPS), 2014
filesize286731
citations0


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