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FPGA architecture support for heterogeneous, relocatable partial bitstreams

contributor authorHuriaux, C.
contributor authorSentieys, O.
contributor authorTessier, R.
date accessioned2020-03-12T21:09:43Z
date available2020-03-12T21:09:43Z
date issued2014
identifier other6927494.pdf
identifier urihttps://libsearch.um.ac.ir:443/fum/handle/fum/1039118?show=full
formatgeneral
languageEnglish
publisherIEEE
titleFPGA architecture support for heterogeneous, relocatable partial bitstreams
typeConference Paper
contenttypeMetadata Only
identifier padid8165896
subject keywordsComputer architecture
subject keywordsIP networks
subject keywordsLoad modeling
subject keywordsPrototypes
subject keywordsRouting protocols
subject keywordsSoftware
subject keywordsNetwork Function Description
subject keywordsNetwork Function Virtualization
subject keywordsVNF Configuration
identifier doi10.1109/UCC.2014.122
journal titleield Programmable Logic and Applications (FPL), 2014 24th International Conference on
filesize209859
citations0


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