Rapid design space exploration of two-level unified caches
ناشر:
سال
: 2014شناسه الکترونیک: 10.1109/NEWCAS.2014.6934005
کلیدواژه(گان): logic design,object-oriented programming,program compilers,system-on-chip,FSM synthesis,IP integration process,IP interface design compiler,SoC design,SystemC based input specifications,code generation technique,compiler technique,interface synthesis tool,lexical analysis technique,programming paradigm,protocol signal mapping proxy,protocol specification,silicon intellectual property,syntax parsing technique,system-on-chip design,Hardware,IP networks,Ports (Computers),Proto
کالکشن
:
-
آمار بازدید
Rapid design space exploration of two-level unified caches
Show full item record
| contributor author | Jingyu Deng , Yun Liang , Guojie Luo , Guangyu Sun | |
| date accessioned | 2020-03-12T20:21:44Z | |
| date available | 2020-03-12T20:21:44Z | |
| date issued | 2014 | |
| identifier other | 6865540.pdf | |
| identifier uri | https://libsearch.um.ac.ir:443/fum/handle/fum/1011709 | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Rapid design space exploration of two-level unified caches | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8134314 | |
| subject keywords | logic design | |
| subject keywords | object-oriented programming | |
| subject keywords | program compilers | |
| subject keywords | system-on-chip | |
| subject keywords | FSM synthesis | |
| subject keywords | IP integration process | |
| subject keywords | IP interface design compiler | |
| subject keywords | SoC design | |
| subject keywords | SystemC based input specifications | |
| subject keywords | code generation technique | |
| subject keywords | compiler technique | |
| subject keywords | interface synthesis tool | |
| subject keywords | lexical analysis technique | |
| subject keywords | programming paradigm | |
| subject keywords | protocol signal mapping proxy | |
| subject keywords | protocol specification | |
| subject keywords | silicon intellectual property | |
| subject keywords | syntax parsing technique | |
| subject keywords | system-on-chip design | |
| subject keywords | Hardware | |
| subject keywords | IP networks | |
| subject keywords | Ports (Computers) | |
| subject keywords | Proto | |
| identifier doi | 10.1109/NEWCAS.2014.6934005 | |
| journal title | ircuits and Systems (ISCAS), 2014 IEEE International Symposium on | |
| filesize | 472834 | |
| citations | 0 |