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Role of Injection Barrier in Capacitance-Voltage Measurements of Organic Devices

Type: Journal Paper

Author : Nigam, Abhishek; Nair, P.R.; Premaratne, Malin; Rao, Valipe Ramgopal

Publisher: IEEE

Year: 2014

Plastic Deformation Study of Vertical Zinc Oxide Nanowires for Polymer Cantilever-Based Sensor Applications

Type: Journal Paper

Author : Ray, Priyadip; Nathawat, Rashi; Apte, Prakash R.; Rao, Valipe Ramgopal

Publisher: IEEE

Year: 2014

Metal-Gate Granularity-Induced Threshold Voltage Variability and Mismatch in Si Gate-All-Around Nanowire n-MOSFETs

Type: Journal Paper

Author : Nayak, Kaushik; Agarwal, Sankalp; Bajaj, Mohit; Oldiges, Philip J.; Murali, Kota V. R. M.; Rao, Valipe Ramgopal

Publisher: IEEE

Year: 2014

Fabrication and Analysis of a <formula formulatype="inline"> <img src="/images/tex/21408.gif" alt="{\\rm Si}/{\\rm Si}_{0.55}{\\rm Ge}_{0.45}"> </formula> Heterojunction Line Tunnel FET

Type: Journal Paper

Author : Walke, Amey Mahadev; Vandooren, A.; Rooyackers, R.; Leonelli, Daniele; Hikavyy, Andriy; Loo, Roger; Verhulst, Anne S.; Kuo-Hsing Kao; Huyghebaert, Cedric; Groeseneken, Guido; Rao, Valipe Ramgopal; Bhuwalka, Krishna K.; Heyns, M.M.; Collaert, Nadine; Thean, Aaron Voon-Yew

Publisher: IEEE

Year: 2014

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Role of Injection Barrier in Capacitance-Voltage Measurements of Organic Devices

Plastic Deformation Study of Vertical Zinc Oxide Nanowires for Polymer Cantilever-Based Sensor Applications

Metal-Gate Granularity-Induced Threshold Voltage Variability and Mismatch in Si Gate-All-Around Nanowire n-MOSFETs

Fabrication and Analysis of a <formula formulatype="inline"> <img src="/images/tex/21408.gif" alt="{\\rm Si}/{\\rm Si}_{0.55}{\\rm Ge}_{0.45}"> </formula> Heterojunction Line Tunnel FET

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Role of Injection Barrier in Capacitance-Voltage Measurements of Organic Devices

Plastic Deformation Study of Vertical Zinc Oxide Nanowires for Polymer Cantilever-Based Sensor Applications

Metal-Gate Granularity-Induced Threshold Voltage Variability and Mismatch in Si Gate-All-Around Nanowire n-MOSFETs

Fabrication and Analysis of a <formula formulatype="inline"> <img src="/images/tex/21408.gif" alt="{\\rm Si}/{\\rm Si}_{0.55}{\\rm Ge}_{0.45}"> </formula> Heterojunction Line Tunnel FET