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Virtual semi-concurrent self-checking for heterogeneous MPSoC architectures

Type: Journal Paper

Author : Mariagiovanna Sami; Gianluca Palermo

Year: 2014

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Low Power Networks-on-Chip

Type: Ebook

Author : Cristina Silvano; Marcello Lajolo; Gianluca Palermo

Year: 2010

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An efficient synchronization technique for multiprocessor systems on-chip

Type: Journal Paper

Author : Matteo Monchiero; Gianluca Palermo; Cristina Silvano; Oreste Villa

Year: 2006

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The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems

Type: Journal Paper

Author : Fernando Herrera; Héctor Posadas; Pablo Peñil; Eugenio Villar; Francisco Ferrero; Raúl Valencia; Gianluca Palermo

Year: 2014

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Low Power Networks-on-Chip

Type: Ebook

Author : Mark A. Anders; Himanshu Kaul; Ram K. Krishnamurthy; Shekhar Y. Borkar (auth.); Cristina Silvano; Marcello Lajolo; Gianluca Palermo (eds.)

Publisher: Springer US

Year: 2011

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The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration

Type: Journal Paper

Author : Kim Grüttner; Philipp A. Hartmann; Kai Hylla; Sven Rosinger; Wolfgang Nebel; Fernando Herrera; Eugenio Villar; Carlo Brandolese; William Fornaciari; Gianluca Palermo; Chantal Ykman-Couvreur; Davide Quaglia; Francisco Ferrero; Raúl Valencia

Year: 2013

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Virtual semi-concurrent self-checking for heterogeneous MPSoC architectures

Low Power Networks-on-Chip

An efficient synchronization technique for multiprocessor systems on-chip

The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems

Low Power Networks-on-Chip

The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration

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Virtual semi-concurrent self-checking for heterogeneous MPSoC architectures

Low Power Networks-on-Chip

An efficient synchronization technique for multiprocessor systems on-chip

The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems

Low Power Networks-on-Chip

The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration