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    A low-power architecture for integrating analog-to-digital converters 

    Type: Conference Paper
    Author : احسان رحیمی نژاد; رضا لطفی; ehsan rahiminejad; Reza Lotfi
    Year: 2009
    Abstract:

    This paper reports on a modified architecture for

    single-slope integrating analog-to-digital converter (ADC) for

    use in image sensors and biomedical or any other applications

    where the value of the ...

    Detailed Study of the Time Estimation in Level-Crossing Analog-to-Digital Converters 

    Type: Conference Paper
    Author : نسیم روان شاد; حمیدرضا رضائی ده سرخ; رضا لطفی; nassim ravanshad; Hamidreza Rezaee Dehsorkh; Reza Lotfi
    Year: 2013
    Abstract:

    Level-crossing analog-to-digital converters

    (LC-ADCs) have shown to be power-efficient for a wide range of

    applications where sparse signals are processed. In this paper,

    after addressing different ...

    Modified Structures for Power-Efficient Level Translators 

    Type: Conference Paper
    Author : سیدرسول حسینی بلداجی; احسان رحیمی نژاد; رضا لطفی; Seyed Rasool Hosseini; Ehsan Rahiminejad; Reza Lotfi
    Year: 2013
    Abstract:

    Reducing the supply voltage of a digital integrated

    circuit decreases the power consumption and also the circuit

    speed. One effective way for low-power design of digital

    integrated circuits is to employ two or multiple supply...

    ON THE POWER EFFICIENCY OF CASCODE COMPENSATION OVER MILLER COMPENSATION IN TWO-STAGE OPERATIONAL AMPLIFIERS 

    Type: Journal Paper
    Author : حامد امین زاده; رضا لطفی; Reza Lotfi
    Year: 2008
    Abstract:

    Optimization of power consumption is one of the main design challenges in today’s lowpower

    high-speed analog integrated circuits. In this paper, two popular techniques to

    stabilize two-stage operational ...

    A Novel Vernier-based Time to Digital Converter for Low-power RFID Sensor Tags 

    Type: Conference Paper
    Author : Shahrokhi, Seyed Hossein; Hosseinzadeh, Mehdi
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    A Novel Circuit Design Technique to Minimize Sleep Mode Power Consumption due to Leakage Power in the Sub-100nm Wide Gates in CMOS Technology 

    Type: Journal Paper
    Author : علی پیروی; محمد آسیایی; Ali Peiravi; Mohammad Asyaei
    Year: 2008
    Abstract:

    With the rapid scaling down of CMOS manufacturing technology, the reduction in leakage

    power has become an important concern in low voltage, low power and high performance applications. In

    this paper a novel ...

    Power Reduction Techniques in a 6 bit 1 GSPS Flash ADC 

    Type: Conference Paper
    Author : سیدهادی نصراله الحسینی; سمانه بابایان مشهدی; رضا لطفی; Seyed Hadi Nasrollaholhosseini; Samaneh Babayan; Reza Lotfi
    Year: 2012
    Abstract:

    Abstract-Flash Analog-to-Digital Converters (ADCs) are usually

    used in high-speed yet low-resolution applications such as wideband

    radio transceivers. Since the power consumption of such

    ADCs exponentially ri

    A 5.3-9.3 fJ/Conversion-Step 4-32 MS/s 10 bit Asynchronous SAR ADC with Optimized DAC Timing Strategy in 0.13 μm CMOS 

    Type: Journal Paper
    Author : محسن دشتبیاضی; محمد طاهرزاده ثانی; سمانه بابایان مشهدی; احسان رحیمی نژاد; mohsen dashtbayazi; Mohammad Taherzadeh-Sani; Samaneh Babayan; Ehsan Rahiminejad
    Year: 2014
    Abstract:

    In this paper, a low power SAR Analog to Digital

    Converter (ADC) with a resolution of 10 bits and a sampling

    rate of 4 to 32 MS/s is proposed. It utilizes an asynchronous

    process with an optimized D/A ...

    A new fuzzy active-disturbance rejection controller applied in PMSM position servo system 

    Type: Conference Paper
    Author : Jiang-tao Gai; Shou-dao Huang; Qing Huang; Meng-qiu Li; Hui Wang; De-rong Luo; Xuan Wu; Wu Liao
    Publisher: IEEE
    Year: 2014

    CEMob: Critical Data Transmission in Emergency with Mobility Support in WBANs 

    Type: Conference Paper
    Publisher: IEEE
    Year: 2014
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