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A 200GHz power mixer in 130nm-CMOS employing nonlinearity engineering

Type: Conference Paper

Author : Sharma, J. , Dinc, T. , Krishnaswamy, H.

Publisher: IEEE

Year: 2014

Joint network and dirty-paper coding for multi-way relay networks with pairwise information exchange

Type: Conference Paper

Author : Sima, Jin; Chen, Wei

Publisher: IEEE

Year: 2014

Exploiting large-scale MIMO techniques for physical layer security with imperfect channel state information

Type: Conference Paper

Author : Chen, Xiaoming; Yuen, Chau; Zhang, Zhaoyang

Publisher: IEEE

Year: 2014

Hand posture recognition using the intrinsic dimension

Type: Conference Paper

Author : Oprisescu, S. , Ciuc, M. , Vasile, I.

Publisher: IEEE

Year: 2014

Using pMOS Pass-Gates to Boost SRAM Performance by Exploiting Strain Effects in Sub-20-nm FinFET Technologies

Type: Journal Paper

Author : Royer, Pablo; Lopez-Vallejo, Marisa

Publisher: IEEE

Year: 2014

Power control and beamformer design for the optimization of full-duplex MIMO relays in a dual-hop MISO link

Type: Conference Paper

Publisher: IEEE

Year: 2014

Simulation Study of the Selectively Implanted Deep-N-Well for PMOS SET Mitigation

Type: Journal Paper

Author : He Yibai; Chen Shuming

Publisher: IEEE

Year: 2014

Synthesis of equival ent circuits for embedded RLC-components based-on LTCC

Type: Conference Paper

Author : Karaban, V.M.; Zyrin, I.D.

Publisher: IEEE

Year: 2014

A study on measurement method of shielding effectiveness using loop antenna in low-frequency

Type: Conference Paper

Author : Ishii, Masanori; Yamazaki, Yoshiki

Publisher: IEEE

Year: 2014

Technical Program Committee

Type: Conference Paper

Publisher: IEEE

Year: 2014

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A 200GHz power mixer in 130nm-CMOS employing nonlinearity engineering

Joint network and dirty-paper coding for multi-way relay networks with pairwise information exchange

Exploiting large-scale MIMO techniques for physical layer security with imperfect channel state information

Hand posture recognition using the intrinsic dimension

Using pMOS Pass-Gates to Boost SRAM Performance by Exploiting Strain Effects in Sub-20-nm FinFET Technologies

Power control and beamformer design for the optimization of full-duplex MIMO relays in a dual-hop MISO link

Simulation Study of the Selectively Implanted Deep-N-Well for PMOS SET Mitigation

Synthesis of equival ent circuits for embedded RLC-components based-on LTCC

A study on measurement method of shielding effectiveness using loop antenna in low-frequency

Technical Program Committee

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A 200GHz power mixer in 130nm-CMOS employing nonlinearity engineering

Joint network and dirty-paper coding for multi-way relay networks with pairwise information exchange

Exploiting large-scale MIMO techniques for physical layer security with imperfect channel state information

Hand posture recognition using the intrinsic dimension

Using pMOS Pass-Gates to Boost SRAM Performance by Exploiting Strain Effects in Sub-20-nm FinFET Technologies

Power control and beamformer design for the optimization of full-duplex MIMO relays in a dual-hop MISO link

Simulation Study of the Selectively Implanted Deep-N-Well for PMOS SET Mitigation

Synthesis of equival ent circuits for embedded RLC-components based-on LTCC

A study on measurement method of shielding effectiveness using loop antenna in low-frequency

Technical Program Committee