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RISUltra Low Power Full Adder Topologies
Year: 2009
Abstract:
In this paper several low power full adder topologies are
presented. The main idea of these circuits is based on the sense energy
recovery full adder (SERF) design and the GDI (Gate diffusion input)
technique. These subthreshold...
Characterizing Communication Networks Associated with Political Hashtags
Publisher: IEEE
Year: 2014
Content-Based Feature Matching for Fragment Reassembly of Ceramic Reconstruction
Publisher: IEEE
Year: 2014
1bit subthreshold full adders in 65nm CMOS technology
Year: 2008
Abstract:
In this paper a new full adder (FA) circuit optimized for ultra low power operation is proposed. The
circuit is based on modified XOR gates operated in the subthreshold region to minimize the power consumption. Simulated results using 65nm...
Adaptive channel estimation based on sparsity detection
Publisher: IEEE
Year: 2014
Reactive power influence on power quality for grid connected converter in DPGS applications
Publisher: IEEE
Year: 2014
Bayesian recognition of safety relevant motion activities with inertial sensors and barometer
Publisher: IEEE
Year: 2014