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Now showing items 1-8 of 8

Effect of voltage scaling on symmetric multicore's speed-up

Type: Conference Paper

Author : Nejatollahi, Hamid; Salehi, Mostafa E.

Publisher: IEEE

Year: 2014

Fault tolerant task scheduling algorithm for multicore systems

Type: Conference Paper

Author : Shiravi, Shamim; Salehi, Mostafa E.

Publisher: IEEE

Year: 2014

A fast design space exploration for VLIW architectures

Type: Conference Paper

Author : Yazdani, Reza; Sheidaeian, Hamed; Salehi, Mostafa E.

Publisher: IEEE

Year: 2014

Evaluating GA and PSO evolutionary algorithms for humanoid walk pattern planning

Type: Conference Paper

Author : Azarkaman, Mostafa; Aghaabbasloo, Mohammad; Salehi, Mostafa E.

Publisher: IEEE

Year: 2014

An analytical method for reliability aware instruction set extension

Type: Journal Paper

Author : Azarpeyvand, Ali; Salehi, Mostafa E.; Fakhraie, Sied Mehdi

Publisher: Springer

Year: 2013

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[IEEE 2010 2nd Asia Symposium on Quality Electronic Design (ASQED 2010) - Penang, Malaysia (2010.08.3-2010.08.4)] 2nd Asia Symposium on Quality Electronic Design (ASQED) - Locality considerations in exploring custom instruction selection algorithms

Type: Journal Paper

Author : Yazdanbakhsh, Amir; Salehi, Mostafa E.; Safari, S.; Fakhraie, Sied Mehdi

Year: 2010

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Action selection using cooperative occupancy grid map for humanoid soccer robot

Type: Conference Paper

Author : Foroughi, Bahareh; Safdari, Reza; Kashkoee, Reza; Salehi, Mostafa E.

Publisher: IEEE

Year: 2014

[IEEE 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - Vienna, Austria (2010.04.14-2010.04.16)] 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - Instruction reliability analysis for embedded processors

Type: Journal Paper

Author : Azarpeyvand, Ali; Salehi, Mostafa E.; Firouzi, Farshad; Yazdanbakhsh, Amir; Fakhraie, Sied Mehdi

Year: 2010

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Effect of voltage scaling on symmetric multicore's speed-up

Fault tolerant task scheduling algorithm for multicore systems

A fast design space exploration for VLIW architectures

Evaluating GA and PSO evolutionary algorithms for humanoid walk pattern planning

An analytical method for reliability aware instruction set extension

[IEEE 2010 2nd Asia Symposium on Quality Electronic Design (ASQED 2010) - Penang, Malaysia (2010.08.3-2010.08.4)] 2nd Asia Symposium on Quality Electronic Design (ASQED) - Locality considerations in exploring custom instruction selection algorithms

Action selection using cooperative occupancy grid map for humanoid soccer robot

[IEEE 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - Vienna, Austria (2010.04.14-2010.04.16)] 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - Instruction reliability analysis for embedded processors

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Effect of voltage scaling on symmetric multicore's speed-up

Fault tolerant task scheduling algorithm for multicore systems

A fast design space exploration for VLIW architectures

Evaluating GA and PSO evolutionary algorithms for humanoid walk pattern planning

An analytical method for reliability aware instruction set extension

[IEEE 2010 2nd Asia Symposium on Quality Electronic Design (ASQED 2010) - Penang, Malaysia (2010.08.3-2010.08.4)] 2nd Asia Symposium on Quality Electronic Design (ASQED) - Locality considerations in exploring custom instruction selection algorithms

Action selection using cooperative occupancy grid map for humanoid soccer robot

[IEEE 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - Vienna, Austria (2010.04.14-2010.04.16)] 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - Instruction reliability analysis for embedded processors