In this paper, a new circuit idea for improving the noise immunity of domino logics especially for wide ones, is presented. Dynamic gates are widely used for high performance processors and are also used in full adders ...

As the CMOS manufacturing process scales down into the ultra deep sub-micron regime, the leakage current becomes an increasingly more imortant consideration in VLSI circuit design. In this paper, a high speed and noise ...

Robustness of high fan-in domino circuits is degraded by technology scaling due to exponential increase in leakage. In this paper, we propose a new domino circuit for high fan-in and high-speed applications in ultra deep ...

Dynamic logic circuits are used for high performance circuits. Wide OR gates are employed for high speed processors, DRAM, SRAM and high speed logic circuits. Dynamic logic circuits are used for their high performance, but ...

In this paper, the results of research carried out in order to develop and present a new logic for the design and development of leakage-tolerant and noise immune circuits in the ultra deep submicron CMOS technology are ...

As the CMOS manufacturing process scales down into the ultra deep sub-micron regime, the gate leakage currents become an increasingly more important consideration in VLSI circuit design. In this paper, a high speed and ...

In this paper a new full adder (FA) circuit optimized for ultra low power operation is proposed. The

circuit is based on modified XOR gates operated in the subthreshold region to minimize the power consumption. ...

In this paper several low power full adder topologies are

presented. The main idea of these circuits is based on the sense energy

recovery full adder (SERF) design and the GDI (Gate diffusion input)

technique. ...