Search
CSV
RISnode to node error sensitivity analysis usimg a graph based approach for vlsi logic circuits
Year: 2015
Abstract:
Shrinking the transistors size and supply voltage in the advanced VLSI logic circuits, significantly increases the susceptibility of the circuits to soft errors. Therefore, analysis of the effects on other nodes, caused ...
Impact of Nuclear Reaction Models on Neutron-Induced Soft Error Rate Analysis
Publisher: IEEE
Year: 2014
Neutron Shielding Effect of Stacked Servers and Its Impact on Reduction of Soft Error Rate
Publisher: IEEE
Year: 2014
An Efficient Multiple Cell Upsets Tolerant Content-Addressable Memory
Publisher: IEEE
Year: 2014
Experimental results on obstacle avoidance for high speed unmanned surface vehicles
Publisher: IEEE
Year: 2014
Comparison of spectral estimation methods for current estimation by an HF surface wave radar
Publisher: IEEE
Year: 2014
Thermal Neutron-Induced Soft Errors in Advanced Memory and Logic Devices
Publisher: IEEE
Year: 2014
Dual-Polarimetry for Soil Moisture Inversion at X-Band
Publisher: IEEE
Year: 2014
Planar antenna miniaturization by inserting nicks method
Publisher: IEEE
Year: 2014