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Measurements of Process Variability in 40-nm Regular and Nonregular Layouts

Type: Journal Paper

Author : Mauricio, J.; Moll, Francesc; Gomez, Sergio

Publisher: IEEE

Year: 2014

Logical Effort for CMOS-Based Dual Mode Logic Gates

Type: Journal Paper

Author : Levi, Itamar; Belenky, Alexander; Fish, Alexander

Publisher: IEEE

Year: 2014

BSIM6: Analog and RF Compact Model for Bulk MOSFET

Type: Journal Paper

Author : Chauhan, Yogesh Singh; Venugopalan, Sarad; Chalkiadaki, Maria-Anna; Karim, Muhammed Ahosan Ul; Agarwal, Harshit; Khandelwal, Sourabh; Paydavosi, Navid; Duarte, Juan Pablo; Enz, C.C.; Niknejad, Ali M.; Chenming Hu

Publisher: IEEE

Year: 2014

A 1.59 Gpixel/s Motion Estimation Processor With <formula formulatype="inline"> <img src="/images/tex/277.gif" alt="-"> </formula>211 to +211 Search Range for UHDTV Video Encoder

Type: Journal Paper

Author : Dajiang Zhou; Jinjia Zhou; Gang He; Goto, Satoshi

Publisher: IEEE

Year: 2014

Cost-Effective Schottky-Barrier Diode Array With Ni–Silicidation Accessing Low Power Phase-Change Memory

Type: Journal Paper

Author : Yan Liu; Chao Zhang; Zhitang Song; Bo Liu; Guanping Wu; Jia Xu; Lianhong Wang; Lei Wang; Zuoya Yang; Songlin Feng

Publisher: IEEE

Year: 2014

Classifying text documents using unconventional representation

Type: Conference Paper

Author : Harish, B.S. , Aruna Kumar, S.V. , Manjunath, S.

Publisher: IEEE

Year: 2014

Hardware/software approach for code synchronization in low-power multi-core sensor nodes

Type: Conference Paper

Publisher: IEEE

Year: 2014

ARO-PUF: An aging-resistant ring oscillator PUF design

Type: Conference Paper

Publisher: IEEE

Year: 2014

EATBit: Effective automated test for binary translation with high code coverage

Type: Conference Paper

Publisher: IEEE

Year: 2014

Context aware power management for motion-sensing body area network nodes

Type: Conference Paper

Author : Casamassima, F. , Farella, E. , Benini, L.

Publisher: IEEE

Year: 2014

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Measurements of Process Variability in 40-nm Regular and Nonregular Layouts

Logical Effort for CMOS-Based Dual Mode Logic Gates

BSIM6: Analog and RF Compact Model for Bulk MOSFET

A 1.59 Gpixel/s Motion Estimation Processor With <formula formulatype="inline"> <img src="/images/tex/277.gif" alt="-"> </formula>211 to +211 Search Range for UHDTV Video Encoder

Cost-Effective Schottky-Barrier Diode Array With Ni–Silicidation Accessing Low Power Phase-Change Memory

Classifying text documents using unconventional representation

Hardware/software approach for code synchronization in low-power multi-core sensor nodes

ARO-PUF: An aging-resistant ring oscillator PUF design

EATBit: Effective automated test for binary translation with high code coverage

Context aware power management for motion-sensing body area network nodes

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Measurements of Process Variability in 40-nm Regular and Nonregular Layouts

Logical Effort for CMOS-Based Dual Mode Logic Gates

BSIM6: Analog and RF Compact Model for Bulk MOSFET

A 1.59 Gpixel/s Motion Estimation Processor With <formula formulatype="inline"> <img src="/images/tex/277.gif" alt="-"> </formula>211 to +211 Search Range for UHDTV Video Encoder

Cost-Effective Schottky-Barrier Diode Array With Ni&#x2013;Silicidation Accessing Low Power Phase-Change Memory

Classifying text documents using unconventional representation

Hardware/software approach for code synchronization in low-power multi-core sensor nodes

ARO-PUF: An aging-resistant ring oscillator PUF design

EATBit: Effective automated test for binary translation with high code coverage

Context aware power management for motion-sensing body area network nodes

Cost-Effective Schottky-Barrier Diode Array With Ni–Silicidation Accessing Low Power Phase-Change Memory