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Digital Background Calibration of Capacitor Mismatch Errors in Pipelined ADCs
Year: 2006
Abstract:
A digital background calibration technique is proposed to correct for the linearity error due to capacitor mismatches in pipelined analog-to-digital converters (ADCs). During the normal ADC operation, it randomly swaps the feedback capacitor...
An 8 Bit 4 GS/s 120 mW CMOS ADC
Publisher: IEEE
Year: 2014