A Sub-1 V Transient-Enhanced Output-Capacitorless LDO Regulator With Push–Pull Composite Power Transistor
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Year
: 2014DOI: 10.1109/TVLSI.2013.2290702
Keyword(s): CMOS integrated circuits,circuit stability,composite materials,power MOSFET,power integrated circuits,OCL-LDO regulator,UMC CMOS technology,current 16.2 muA,current 50 mA,nondominant parasitic pole,push-pull composite power transistor,size 65 nm,slew rate limitation,stability,time 1.2 mus,transient-enhanced output-capacitorless low-dropout regulator,voltage 0.75 V,voltage 1 V,Capacitors,Logic gates,Power transistors,Regulators,Stability analysis,Transistors,Voltage contro
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A Sub-1 V Transient-Enhanced Output-Capacitorless LDO Regulator With Push–Pull Composite Power Transistor
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| contributor author | Sau Siong Chong | |
| contributor author | Pak Kwong Chan | |
| date accessioned | 2020-03-12T18:42:16Z | |
| date available | 2020-03-12T18:42:16Z | |
| date issued | 2014 | |
| identifier issn | 1063-8210 | |
| identifier other | 6719547.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/967476 | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | A Sub-1 V Transient-Enhanced Output-Capacitorless LDO Regulator With Push–Pull Composite Power Transistor | |
| type | Journal Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8001470 | |
| subject keywords | CMOS integrated circuits | |
| subject keywords | circuit stability | |
| subject keywords | composite materials | |
| subject keywords | power MOSFET | |
| subject keywords | power integrated circuits | |
| subject keywords | OCL-LDO regulator | |
| subject keywords | UMC CMOS technology | |
| subject keywords | current 16.2 muA | |
| subject keywords | current 50 mA | |
| subject keywords | nondominant parasitic pole | |
| subject keywords | push-pull composite power transistor | |
| subject keywords | size 65 nm | |
| subject keywords | slew rate limitation | |
| subject keywords | stability | |
| subject keywords | time 1.2 mus | |
| subject keywords | transient-enhanced output-capacitorless low-dropout regulator | |
| subject keywords | voltage 0.75 V | |
| subject keywords | voltage 1 V | |
| subject keywords | Capacitors | |
| subject keywords | Logic gates | |
| subject keywords | Power transistors | |
| subject keywords | Regulators | |
| subject keywords | Stability analysis | |
| subject keywords | Transistors | |
| subject keywords | Voltage contro | |
| identifier doi | 10.1109/TVLSI.2013.2290702 | |
| journal title | Very Large Scale Integration (VLSI) Systems, IEEE Transactions on | |
| journal volume | 22 | |
| journal issue | 11 | |
| filesize | 2956768 | |
| citations | 1 |