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A precise on-chip voltage generator for a gigascale DRAM with a negative word-line scheme

Author:
Tanaka, H.
,
Aoki, M.
,
Sakata, T.
,
Kimura, S.
,
Sakashita, N.
,
Hidaka, H.
,
Tachibana, T.
,
Kimura, K.
Year
: 1999
DOI: 10.1109/4.777106
URI: http://libsearch.um.ac.ir:80/fum/handle/fum/486377
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    A precise on-chip voltage generator for a gigascale DRAM with a negative word-line scheme

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contributor authorTanaka, H.
contributor authorAoki, M.
contributor authorSakata, T.
contributor authorKimura, S.
contributor authorSakashita, N.
contributor authorHidaka, H.
contributor authorTachibana, T.
contributor authorKimura, K.
date accessioned2020-03-11T09:28:28Z
date available2020-03-11T09:28:28Z
date issued1999
identifier other0MoLD5pOljQOHVoDBRUGAgi2SI4eGcOYYq2ANiqG8mjmWWRO_l.pdf
identifier urihttp://libsearch.um.ac.ir:80/fum/handle/fum/486377?locale-attribute=en
formatgeneral
languageEnglish
titleA precise on-chip voltage generator for a gigascale DRAM with a negative word-line scheme
typeJournal Paper
contenttypeFulltext
contenttypeFulltext
identifier padid4093884
identifier doi10.1109/4.777106
journal titleOsmania Journal of Social Sciences
coverageAcademic
pages1084-1090
journal volume34
journal issue8
filesize496157
citations1
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