DTMOS Technique for Low-Voltage Analog Circuits
Year
: 2006
Abstract: In this paper, the application of dynamic threshold MOS (DTMOS) technique for low-voltage analog circuits is explored. The body terminal of PMOS transistors in bulk CMOS technology can be used
as the forth terminal to enhance the performance of low-voltage analog circuits. To show the effectiveness of this technique, we have designed a continuous time common mode feedback (CMFB) circuit for a sub 1-V opamp and a new sub 1-V, 1-bit quantizer. A 0.8-V opamp with embedded
CMFB and a 0.8-V, 1-bit quantizer for low-voltage delta-sigma modulators are implemented in 0.18 um CMOS technology. The simulation results as well as the measurement data of these blocks are presented in this paper.
as the forth terminal to enhance the performance of low-voltage analog circuits. To show the effectiveness of this technique, we have designed a continuous time common mode feedback (CMFB) circuit for a sub 1-V opamp and a new sub 1-V, 1-bit quantizer. A 0.8-V opamp with embedded
CMFB and a 0.8-V, 1-bit quantizer for low-voltage delta-sigma modulators are implemented in 0.18 um CMOS technology. The simulation results as well as the measurement data of these blocks are presented in this paper.
Keyword(s): 1-bit quantizer,CMOS analog circuits,comparator,delta-sigma
modulator,dynamic threshold MOS (DTMOS),operational amplifier
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DTMOS Technique for Low-Voltage Analog Circuits
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| contributor author | محمد میمندی نژاد | en |
| contributor author | Manoj Sachdev | en |
| contributor author | Mohammad Maymandi Nejad | fa |
| date accessioned | 2020-06-06T14:03:01Z | |
| date available | 2020-06-06T14:03:01Z | |
| date issued | 2006 | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/3380319?locale-attribute=en | |
| description abstract | In this paper, the application of dynamic threshold MOS (DTMOS) technique for low-voltage analog circuits is explored. The body terminal of PMOS transistors in bulk CMOS technology can be used as the forth terminal to enhance the performance of low-voltage analog circuits. To show the effectiveness of this technique, we have designed a continuous time common mode feedback (CMFB) circuit for a sub 1-V opamp and a new sub 1-V, 1-bit quantizer. A 0.8-V opamp with embedded CMFB and a 0.8-V, 1-bit quantizer for low-voltage delta-sigma modulators are implemented in 0.18 um CMOS technology. The simulation results as well as the measurement data of these blocks are presented in this paper. | en |
| language | English | |
| title | DTMOS Technique for Low-Voltage Analog Circuits | en |
| type | Journal Paper | |
| contenttype | External Fulltext | |
| subject keywords | 1-bit quantizer | en |
| subject keywords | CMOS analog circuits | en |
| subject keywords | comparator | en |
| subject keywords | delta-sigma modulator | en |
| subject keywords | dynamic threshold MOS (DTMOS) | en |
| subject keywords | operational amplifier | en |
| journal title | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | fa |
| journal volume | 0 | |
| journal issue | 0 | |
| identifier link | https://profdoc.um.ac.ir/paper-abstract-1011552.html | |
| identifier articleid | 1011552 |