Circuit Level Modeling of Extra Combinational Delays in SRAM-Based FPGAs Due to Transient Ionizing Radiation
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سال
: 2014شناسه الکترونیک: 10.1109/TNS.2014.2369424
کلیدواژه(گان): SRAM chips,combinational circuits,delays,field programmable gate arrays,integrated circuit interconnections,integrated circuit modelling,radiation hardening (electronics),CLBs,IOBs,SEUs,SRAM-Based FPGAs,Virtex-5,circuit architecture,circuit level modeling,circuit path,configurable logic blocks,delay faults,extra combinational delays,extra interconnection lines,input-ouput blocks,pass transistors,proton irradiation,routing,single event upsets,transient ionizing radiation
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Circuit Level Modeling of Extra Combinational Delays in SRAM-Based FPGAs Due to Transient Ionizing Radiation
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contributor author | Darvishi, Mostafa | |
contributor author | Audet, Yves | |
contributor author | Blaquiere, Yves | |
contributor author | Thibeault, Claude | |
contributor author | Pichette, Simon | |
contributor author | Tazi, Fatima Zahra | |
date accessioned | 2020-03-13T00:31:12Z | |
date available | 2020-03-13T00:31:12Z | |
date issued | 2014 | |
identifier issn | 0018-9499 | |
identifier other | 6971238.pdf | |
identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1149699 | |
format | general | |
language | English | |
publisher | IEEE | |
title | Circuit Level Modeling of Extra Combinational Delays in SRAM-Based FPGAs Due to Transient Ionizing Radiation | |
type | Journal Paper | |
contenttype | Metadata Only | |
identifier padid | 8333006 | |
subject keywords | SRAM chips | |
subject keywords | combinational circuits | |
subject keywords | delays | |
subject keywords | field programmable gate arrays | |
subject keywords | integrated circuit interconnections | |
subject keywords | integrated circuit modelling | |
subject keywords | radiation hardening (electronics) | |
subject keywords | CLBs | |
subject keywords | IOBs | |
subject keywords | SEUs | |
subject keywords | SRAM-Based FPGAs | |
subject keywords | Virtex-5 | |
subject keywords | circuit architecture | |
subject keywords | circuit level modeling | |
subject keywords | circuit path | |
subject keywords | configurable logic blocks | |
subject keywords | delay faults | |
subject keywords | extra combinational delays | |
subject keywords | extra interconnection lines | |
subject keywords | input-ouput blocks | |
subject keywords | pass transistors | |
subject keywords | proton irradiation | |
subject keywords | routing | |
subject keywords | single event upsets | |
subject keywords | transient ionizing radiation | |
identifier doi | 10.1109/TNS.2014.2369424 | |
journal title | Nuclear Science, IEEE Transactions on | |
journal volume | 61 | |
journal issue | 6 | |
filesize | 1004942 | |
citations | 0 |