A Circuit Synthesis Flow for Controllable-Polarity Transistors
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: 2014DOI: 10.1109/TNANO.2014.2361059
Keyword(s): digital arithmetic,digital circuits,elemental semiconductors,field effect transistors,nanowires,network synthesis,silicon,DG controllable-polarity FET,DG controllable-polarity silicon nanowire FET,FinFET technology,MAJ,Si,XOR,arithmetic functions,automated design techniques,carbon nanotubes,circuit synthesis flow,controllable-polarity transistors,design automation flow,design automation framework,digital circuits delay,double-gate controllable-polarity field-effect transisto
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A Circuit Synthesis Flow for Controllable-Polarity Transistors
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| contributor author | Amaru, Luca | |
| contributor author | Gaillardon, Pierre-Emmanuel | |
| contributor author | De Micheli, G. | |
| date accessioned | 2020-03-13T00:24:36Z | |
| date available | 2020-03-13T00:24:36Z | |
| date issued | 2014 | |
| identifier issn | 1536-125X | |
| identifier other | 6914607.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1145682 | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | A Circuit Synthesis Flow for Controllable-Polarity Transistors | |
| type | Journal Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8328439 | |
| subject keywords | digital arithmetic | |
| subject keywords | digital circuits | |
| subject keywords | elemental semiconductors | |
| subject keywords | field effect transistors | |
| subject keywords | nanowires | |
| subject keywords | network synthesis | |
| subject keywords | silicon | |
| subject keywords | DG controllable-polarity FET | |
| subject keywords | DG controllable-polarity silicon nanowire FET | |
| subject keywords | FinFET technology | |
| subject keywords | MAJ | |
| subject keywords | Si | |
| subject keywords | XOR | |
| subject keywords | arithmetic functions | |
| subject keywords | automated design techniques | |
| subject keywords | carbon nanotubes | |
| subject keywords | circuit synthesis flow | |
| subject keywords | controllable-polarity transistors | |
| subject keywords | design automation flow | |
| subject keywords | design automation framework | |
| subject keywords | digital circuits delay | |
| subject keywords | double-gate controllable-polarity field-effect transisto | |
| identifier doi | 10.1109/TNANO.2014.2361059 | |
| journal title | Nanotechnology, IEEE Transactions on | |
| journal volume | 13 | |
| journal issue | 6 | |
| filesize | 591385 | |
| citations | 0 |