A 0.5-to-3 GHz Software-Defined Radio Receiver Using Discrete-Time RF Signal Processing
Publisher:
Year
: 2014DOI: 10.1109/JSSC.2014.2303791
Keyword(s): CMOS digital integrated circuits,capacitor switching,digital signal processing chips,electric impedance,harmonics suppression,interference suppression,radio receivers,software radio,3rd order harmonic rejection,5th order harmonic rejection,DT RF signal processor,LP CMOS chip,SDR wireless receiver,SNR,discrete-time RF signal processing,frequency 0.5 GHz to 3 GHz,frequency selectivity,frequency translation,frequency tunable high-Q 2nd-order bandpass input impedance,front-end int
Collections
:
-
Statistics
A 0.5-to-3 GHz Software-Defined Radio Receiver Using Discrete-Time RF Signal Processing
Show full item record
| contributor author | Run Chen | |
| contributor author | Hashemi, Hossein | |
| date accessioned | 2020-03-12T23:47:31Z | |
| date available | 2020-03-12T23:47:31Z | |
| date issued | 2014 | |
| identifier issn | 0018-9200 | |
| identifier other | 6744684.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1123482 | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | A 0.5-to-3 GHz Software-Defined Radio Receiver Using Discrete-Time RF Signal Processing | |
| type | Journal Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8302956 | |
| subject keywords | CMOS digital integrated circuits | |
| subject keywords | capacitor switching | |
| subject keywords | digital signal processing chips | |
| subject keywords | electric impedance | |
| subject keywords | harmonics suppression | |
| subject keywords | interference suppression | |
| subject keywords | radio receivers | |
| subject keywords | software radio | |
| subject keywords | 3rd order harmonic rejection | |
| subject keywords | 5th order harmonic rejection | |
| subject keywords | DT RF signal processor | |
| subject keywords | LP CMOS chip | |
| subject keywords | SDR wireless receiver | |
| subject keywords | SNR | |
| subject keywords | discrete-time RF signal processing | |
| subject keywords | frequency 0.5 GHz to 3 GHz | |
| subject keywords | frequency selectivity | |
| subject keywords | frequency translation | |
| subject keywords | frequency tunable high-Q 2nd-order bandpass input impedance | |
| subject keywords | front-end int | |
| identifier doi | 10.1109/JSSC.2014.2303791 | |
| journal title | Solid-State Circuits, IEEE Journal of | |
| journal volume | 49 | |
| journal issue | 5 | |
| filesize | 4155818 | |
| citations | 0 |