Application specific optimization of coarse-grained reconfigurable architecture by dynamic context compression
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: 2014DOI: 10.1109/ICCPEIC.2014.6915366
Keyword(s): Educational institutions,n Heterojunction bipolar transistors,n Inverters,n Switches,n Torque control,n Vectors,n Diode clamped inverter,n Direct torque control,n Induction Motor,n Multilevel inverter,n ST-DTC,n Three level Inverter
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Application specific optimization of coarse-grained reconfigurable architecture by dynamic context compression
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| contributor author | Priyadharsini, S. | |
| contributor author | Srilalitha, A. | |
| date accessioned | 2020-03-12T23:00:00Z | |
| date available | 2020-03-12T23:00:00Z | |
| date issued | 2014 | |
| identifier other | 7033779.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1101994 | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Application specific optimization of coarse-grained reconfigurable architecture by dynamic context compression | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8244499 | |
| subject keywords | Educational institutions | |
| subject keywords | n Heterojunction bipolar transistors | |
| subject keywords | n Inverters | |
| subject keywords | n Switches | |
| subject keywords | n Torque control | |
| subject keywords | n Vectors | |
| subject keywords | n Diode clamped inverter | |
| subject keywords | n Direct torque control | |
| subject keywords | n Induction Motor | |
| subject keywords | n Multilevel inverter | |
| subject keywords | n ST-DTC | |
| subject keywords | n Three level Inverter | |
| identifier doi | 10.1109/ICCPEIC.2014.6915366 | |
| journal title | nformation Communication and Embedded Systems (ICICES), 2014 International Conference on | |
| filesize | 767306 | |
| citations | 0 |