A Narrative Analysis by Text Mining Technique Using Key Graph: Similarity and Difference of a View of Oral Health and Oral Risk Cognition between Japanese Living People and Dentists
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Year
: 2014DOI: 10.1109/ISVLSI.2014.101
Keyword(s): CMOS logic circuits,n MOSFET,n VLSI,n circuit optimisation,n combinational circuits,n integrated circuit design,n low-power electronics,n sequential circuits,n FinFET standard cell library optimization,n bulk CMOS technology,n circuit speed,n circuit synthesis,n combinational circuits,n energy reduction,n near-ideal subthreshold behavior,n sequential circuits,n size 5 nm,n superthreshold supply voltage regime,n CMOS integrated circuits,n E
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A Narrative Analysis by Text Mining Technique Using Key Graph: Similarity and Difference of a View of Oral Health and Oral Risk Cognition between Japanese Living People and Dentists
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| contributor author | Kobayashi, Fukiko | |
| contributor author | Nara, Yumiko | |
| date accessioned | 2020-03-12T22:45:32Z | |
| date available | 2020-03-12T22:45:32Z | |
| date issued | 2014 | |
| identifier other | 7022631.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1093550?locale-attribute=en | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | A Narrative Analysis by Text Mining Technique Using Key Graph: Similarity and Difference of a View of Oral Health and Oral Risk Cognition between Japanese Living People and Dentists | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8233006 | |
| subject keywords | CMOS logic circuits | |
| subject keywords | n MOSFET | |
| subject keywords | n VLSI | |
| subject keywords | n circuit optimisation | |
| subject keywords | n combinational circuits | |
| subject keywords | n integrated circuit design | |
| subject keywords | n low-power electronics | |
| subject keywords | n sequential circuits | |
| subject keywords | n FinFET standard cell library optimization | |
| subject keywords | n bulk CMOS technology | |
| subject keywords | n circuit speed | |
| subject keywords | n circuit synthesis | |
| subject keywords | n combinational circuits | |
| subject keywords | n energy reduction | |
| subject keywords | n near-ideal subthreshold behavior | |
| subject keywords | n sequential circuits | |
| subject keywords | n size 5 nm | |
| subject keywords | n superthreshold supply voltage regime | |
| subject keywords | n CMOS integrated circuits | |
| subject keywords | n E | |
| identifier doi | 10.1109/ISVLSI.2014.101 | |
| journal title | ata Mining Workshop (ICDMW), 2014 IEEE International Conference on | |
| filesize | 598221 | |
| citations | 0 |