eDOAS: Energy-aware device-oriented adaptive multimedia scheme for Wi-Fi offload
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Year
: 2014DOI: 10.7873/DATE.2014.121
Keyword(s): VLSI,n adders,n circuit feedback,n combinational circuits,n equalisers,n integrated logic circuits,n logic design,n low-power electronics,n UMC process,n carry lookahead adder,n combinational logic blocks,n digital VLSI circuit design,n dominant leakage energy,n energy-delay product,n minimum-energy consumption,n propagation delay,n size 130 nm,n sub-threshold logic circuit design,n supply voltage scaling,n timing errors,n variable thre
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eDOAS: Energy-aware device-oriented adaptive multimedia scheme for Wi-Fi offload
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| contributor author | Zou, Longhao | |
| contributor author | Trestian, Ramona | |
| contributor author | Muntean, Gabriel-Miro | |
| date accessioned | 2020-03-12T21:40:14Z | |
| date available | 2020-03-12T21:40:14Z | |
| date issued | 2014 | |
| identifier other | 6952915.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1056423?locale-attribute=en | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | eDOAS: Energy-aware device-oriented adaptive multimedia scheme for Wi-Fi offload | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8187460 | |
| subject keywords | VLSI | |
| subject keywords | n adders | |
| subject keywords | n circuit feedback | |
| subject keywords | n combinational circuits | |
| subject keywords | n equalisers | |
| subject keywords | n integrated logic circuits | |
| subject keywords | n logic design | |
| subject keywords | n low-power electronics | |
| subject keywords | n UMC process | |
| subject keywords | n carry lookahead adder | |
| subject keywords | n combinational logic blocks | |
| subject keywords | n digital VLSI circuit design | |
| subject keywords | n dominant leakage energy | |
| subject keywords | n energy-delay product | |
| subject keywords | n minimum-energy consumption | |
| subject keywords | n propagation delay | |
| subject keywords | n size 130 nm | |
| subject keywords | n sub-threshold logic circuit design | |
| subject keywords | n supply voltage scaling | |
| subject keywords | n timing errors | |
| subject keywords | n variable thre | |
| identifier doi | 10.7873/DATE.2014.121 | |
| journal title | ireless Communications and Networking Conference (WCNC), 2014 IEEE | |
| filesize | 453145 | |
| citations | 0 |