TCAD structure synthesis and capacitance extraction of a voltage-controlled oscillator using automated layout-to-device synthesis methodology
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سال
: 2014شناسه الکترونیک: 10.1109/ISSCC.2014.6757428
کلیدواژه(گان): digital phase locked loops,n digital-analogue conversion,n integrated circuit design,n oscillators,n advanced automated digital design flows,n all-digital PLL,n clock generation,n conventional analog PLL,n current-output DAC,n current-output digital-to-analog converter,n custom circuit design,n custom-designed cells,n duty balance,n edge-injection technique,n frequency linearity,n frequency resolution,n fully synthesizable PLL,n injection-pulse
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TCAD structure synthesis and capacitance extraction of a voltage-controlled oscillator using automated layout-to-device synthesis methodology
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| contributor author | Bhattacharya, D. | |
| contributor author | Joshi, R.V. | |
| contributor author | Ainspan, H.A. | |
| contributor author | Sathaye, N.D. | |
| contributor author | Bajaj, M. | |
| contributor author | Gundapaneni, S. | |
| contributor author | Jha, N.K. | |
| date accessioned | 2020-03-12T21:31:33Z | |
| date available | 2020-03-12T21:31:33Z | |
| date issued | 2014 | |
| identifier other | 6945998.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1051626?locale-attribute=fa | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | TCAD structure synthesis and capacitance extraction of a voltage-controlled oscillator using automated layout-to-device synthesis methodology | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8181693 | |
| subject keywords | digital phase locked loops | |
| subject keywords | n digital-analogue conversion | |
| subject keywords | n integrated circuit design | |
| subject keywords | n oscillators | |
| subject keywords | n advanced automated digital design flows | |
| subject keywords | n all-digital PLL | |
| subject keywords | n clock generation | |
| subject keywords | n conventional analog PLL | |
| subject keywords | n current-output DAC | |
| subject keywords | n current-output digital-to-analog converter | |
| subject keywords | n custom circuit design | |
| subject keywords | n custom-designed cells | |
| subject keywords | n duty balance | |
| subject keywords | n edge-injection technique | |
| subject keywords | n frequency linearity | |
| subject keywords | n frequency resolution | |
| subject keywords | n fully synthesizable PLL | |
| subject keywords | n injection-pulse | |
| identifier doi | 10.1109/ISSCC.2014.6757428 | |
| journal title | ustom Integrated Circuits Conference (CICC), 2014 IEEE Proceedings of the | |
| filesize | 571844 | |
| citations | 0 |