FPGA acceleration of SAT/Max-SAT solving using variable-way cache
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Year
: 2014DOI: 10.1109/APEDE.2014.6958219
Keyword(s): Educational institutions,Electromagnetic heating,Electronic mail,Microwave technology,Physics,Research and development,Thermal engineering
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FPGA acceleration of SAT/Max-SAT solving using variable-way cache
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| contributor author | Kanazawa, K. | |
| contributor author | Maruyama, T. | |
| date accessioned | 2020-03-12T21:09:33Z | |
| date available | 2020-03-12T21:09:33Z | |
| date issued | 2014 | |
| identifier other | 6927405.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1039027 | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | FPGA acceleration of SAT/Max-SAT solving using variable-way cache | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8165768 | |
| subject keywords | Educational institutions | |
| subject keywords | Electromagnetic heating | |
| subject keywords | Electronic mail | |
| subject keywords | Microwave technology | |
| subject keywords | Physics | |
| subject keywords | Research and development | |
| subject keywords | Thermal engineering | |
| identifier doi | 10.1109/APEDE.2014.6958219 | |
| journal title | ield Programmable Logic and Applications (FPL), 2014 24th International Conference on | |
| filesize | 124723 | |
| citations | 0 |