Multi-objective control design of the nonlinear systems using genetic algorithm
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: 2014DOI: 10.1109/ICNC.2014.6975831
Keyword(s): CMOS logic circuits,MOSFET,adders,network synthesis,neural chips,CMOS process,HSPICE simulation,NORA circuit design,TSMC,complementary metal-oxide-semiconductor,full-adder circuit,n-channel neuron-MOS transistor,nMOS logic block,no race dynamic logic circuit,pMOS logic block,size 0.35 mum,summation signal,synthesis technique,voltage 1.5 V,Adders,Couplings,Latches,Logic gates,MOS devices,Switches,Transistors,CMOS circuits,NORA,dynamic logic,neuron-MOS transistor
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Multi-objective control design of the nonlinear systems using genetic algorithm
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| contributor author | Hajiloo, A. , Wen-Fang Xie | |
| date accessioned | 2020-03-12T20:29:03Z | |
| date available | 2020-03-12T20:29:03Z | |
| date issued | 2014 | |
| identifier other | 6873593.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1016200?locale-attribute=en | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Multi-objective control design of the nonlinear systems using genetic algorithm | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8140003 | |
| subject keywords | CMOS logic circuits | |
| subject keywords | MOSFET | |
| subject keywords | adders | |
| subject keywords | network synthesis | |
| subject keywords | neural chips | |
| subject keywords | CMOS process | |
| subject keywords | HSPICE simulation | |
| subject keywords | NORA circuit design | |
| subject keywords | TSMC | |
| subject keywords | complementary metal-oxide-semiconductor | |
| subject keywords | full-adder circuit | |
| subject keywords | n-channel neuron-MOS transistor | |
| subject keywords | nMOS logic block | |
| subject keywords | no race dynamic logic circuit | |
| subject keywords | pMOS logic block | |
| subject keywords | size 0.35 mum | |
| subject keywords | summation signal | |
| subject keywords | synthesis technique | |
| subject keywords | voltage 1.5 V | |
| subject keywords | Adders | |
| subject keywords | Couplings | |
| subject keywords | Latches | |
| subject keywords | Logic gates | |
| subject keywords | MOS devices | |
| subject keywords | Switches | |
| subject keywords | Transistors | |
| subject keywords | CMOS circuits | |
| subject keywords | NORA | |
| subject keywords | dynamic logic | |
| subject keywords | neuron-MOS transistor | |
| identifier doi | 10.1109/ICNC.2014.6975831 | |
| journal title | nnovations in Intelligent Systems and Applications (INISTA) Proceedings, 2014 IEEE International Sym | |
| filesize | 1760214 | |
| citations | 0 |