Semi-adaptive harmonic control for power balancing device for AC traction
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: 2014DOI: 10.1109/CIS.2014.178
Keyword(s): CMOS logic circuits,clocks,integrated circuit design,logic design,logic gates,neural nets,synchronisation,transistor circuits,CMOS process,HSPICE simulation,MVL,TSMC CMOS technology,dynamic circuit scheme,dynamic ternary inverter,energy consumption,floating output nodes,literal circuits,logic swing,neuron-MOS transistor,propagation delay,quaternary inverter,size 0.35 mum,two-phase clocks,voltage-mode multiple-valued logic,CMOS integrated circuits,Educational institutions
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Semi-adaptive harmonic control for power balancing device for AC traction
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| contributor author | Akagi, M. , Tsuruta, H. , Oso, H. | |
| date accessioned | 2020-03-12T20:25:43Z | |
| date available | 2020-03-12T20:25:43Z | |
| date issued | 2014 | |
| identifier other | 6869652.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1014168?locale-attribute=en | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Semi-adaptive harmonic control for power balancing device for AC traction | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8137468 | |
| subject keywords | CMOS logic circuits | |
| subject keywords | clocks | |
| subject keywords | integrated circuit design | |
| subject keywords | logic design | |
| subject keywords | logic gates | |
| subject keywords | neural nets | |
| subject keywords | synchronisation | |
| subject keywords | transistor circuits | |
| subject keywords | CMOS process | |
| subject keywords | HSPICE simulation | |
| subject keywords | MVL | |
| subject keywords | TSMC CMOS technology | |
| subject keywords | dynamic circuit scheme | |
| subject keywords | dynamic ternary inverter | |
| subject keywords | energy consumption | |
| subject keywords | floating output nodes | |
| subject keywords | literal circuits | |
| subject keywords | logic swing | |
| subject keywords | neuron-MOS transistor | |
| subject keywords | propagation delay | |
| subject keywords | quaternary inverter | |
| subject keywords | size 0.35 mum | |
| subject keywords | two-phase clocks | |
| subject keywords | voltage-mode multiple-valued logic | |
| subject keywords | CMOS integrated circuits | |
| subject keywords | Educational institutions | |
| identifier doi | 10.1109/CIS.2014.178 | |
| journal title | ower Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA), 2014 International | |
| filesize | 2311413 | |
| citations | 0 |