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A 0.8V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS

Author:
Hao Li , Shuai Chen , Liqiong Yang , Rui Bai , Weiwu Hu , Zhong, F.Y. , Palermo, S. , Chiang, P.Y.
Publisher:
IEEE
Year
: 2014
DOI: 10.1109/ALLERTON.2014.7028586
URI: http://libsearch.um.ac.ir:80/fum/handle/fum/1006413
Keyword(s): Companies,Economics,Games,Joining processes,Planning,Shape,Social network services
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    A 0.8V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS

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date accessioned2020-03-12T20:13:18Z
date available2020-03-12T20:13:18Z
date issued2014
identifier other6858399.pdf
identifier urihttp://libsearch.um.ac.ir:80/fum/handle/fum/1006413?locale-attribute=en
formatgeneral
languageEnglish
publisherIEEE
titleA 0.8V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS
typeConference Paper
contenttypeMetadata Only
identifier padid8127951
subject keywordsCompanies
subject keywordsEconomics
subject keywordsGames
subject keywordsJoining processes
subject keywordsPlanning
subject keywordsShape
subject keywordsSocial network services
identifier doi10.1109/ALLERTON.2014.7028586
journal titleLSI Circuits Digest of Technical Papers, 2014 Symposium on
filesize474269
citations0
contributor rawauthorHao Li , Shuai Chen , Liqiong Yang , Rui Bai , Weiwu Hu , Zhong, F.Y. , Palermo, S. , Chiang, P.Y.
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