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نمایش تعداد 1-10 از 18

A high-speed, low input current CMOS integrated front end for multi-spectral photodiode arrays

نوع: Journal Paper

نویسنده : Frederic Nabki; Mounir Boukadoum

سال: 2011

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A 0.8–4-GHz Software-Defined Radio Receiver With Improved Harmonic Rejection Through Non-Overlapped Clocking

نوع: Journal Paper

نویسنده : امیر بذرافشان جورشری; Frederic Nabki; Amir Bazrafshan; Frederic Nabki

سال: 2018

خلاصه:

The RF section of a software-defined-radio receiver front-end with harmonic rejection is presented. The proposed mixer-based receiver provides two programmable notches that can be located in any desired frequencies, e.g., ...

A 350-MS/s Continuous-Time Delta–Sigma Modulator With a Digitally Assisted Binary-DAC and a 5-Bits Two-Step-ADC Quantizer in 130-nm CMOS

نوع: Journal Paper

نویسنده : Mohammad Taherzadeh-Sani; Frederic Nabki

سال: 2014

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18-MHz Silicon Lamé Mode Resonators With Corner and Central Anchor Architectures in a Dual-Wafer SOI Technology

نوع: Journal Paper

نویسنده : Mohannad Y. Elsayed; Frederic Nabki

سال: 2016

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A 10-bit 110 kS/s 1.16 $\mu\hbox{W}$ SA-ADC With a Hybrid Differential/Single-Ended DAC in 180-nm CMOS for Multichannel Biomedical Applications

نوع: Journal Paper

نویسنده : Mohammad Taherzadeh-Sani; Reza Lotfi; Frederic Nabki

سال: 2014

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A 1-V 690 μW 8-bit 200 MS/s flash-SAR ADC with pipelined operation of flash and SAR ADCs in 0.13μm CMOS

نوع: Journal Paper

نویسنده : Monireh Eslami; Mohammad Taherzadeh-Sani; Frederic Nabki

سال: 2015

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A 10-Gb/s low-power low-voltage CTLE using gate and bulk driven transistors

نوع: Journal Paper

نویسنده : Amin Aghighi; Abdul Hafiz Alameh; Mohammad Taherzadeh-Sani; Frederic Nabki

سال: 2016

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65 nm CMOS switching discontinuous-conduction mode buck converter with 330 ns start-up time for light-load power-cycled applications

نوع: Journal Paper

نویسنده : Mohammad Taherzadeh-Sani; Michiel Soer; Dominic Deslandes; Frederic Nabki

سال: 2017

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A 0.4V ultra low-power UWB CMOS LNA employing noise cancellation

نوع: Journal Paper

نویسنده : Mahdi Parvizi; Karim Allidina; Frederic Nabki; Mourad El-Gamal

سال: 2013

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A 350-MS/s Continuous-Time Delta–Sigma Modulator With a Digitally Assisted Binary-DAC and a 5-Bits Two-Step-ADC Quantizer in 130-nm CMOS

نوع: Journal Paper

نویسنده : محمد طاهرزاده ثانی; Frederic Nabki; Mohammad Taherzadeh-Sani

سال: 2015

خلاصه:

Two techniques to improve the performance of continuous-time delta–sigma (CTDS) modulators are presented. A digital calibration technique is introduced to enable the use of binary current digital-to-analog converters (DACs) ...

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A high-speed, low input current CMOS integrated front end for multi-spectral photodiode arrays

A 0.8–4-GHz Software-Defined Radio Receiver With Improved Harmonic Rejection Through Non-Overlapped Clocking

A 350-MS/s Continuous-Time Delta–Sigma Modulator With a Digitally Assisted Binary-DAC and a 5-Bits Two-Step-ADC Quantizer in 130-nm CMOS

18-MHz Silicon Lamé Mode Resonators With Corner and Central Anchor Architectures in a Dual-Wafer SOI Technology

A 10-bit 110 kS/s 1.16 $\mu\hbox{W}$ SA-ADC With a Hybrid Differential/Single-Ended DAC in 180-nm CMOS for Multichannel Biomedical Applications

A 1-V 690 μW 8-bit 200 MS/s flash-SAR ADC with pipelined operation of flash and SAR ADCs in 0.13μm CMOS

A 10-Gb/s low-power low-voltage CTLE using gate and bulk driven transistors

65 nm CMOS switching discontinuous-conduction mode buck converter with 330 ns start-up time for light-load power-cycled applications

A 0.4V ultra low-power UWB CMOS LNA employing noise cancellation

A 350-MS/s Continuous-Time Delta–Sigma Modulator With a Digitally Assisted Binary-DAC and a 5-Bits Two-Step-ADC Quantizer in 130-nm CMOS

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A high-speed, low input current CMOS integrated front end for multi-spectral photodiode arrays

A 0.8–4-GHz Software-Defined Radio Receiver With Improved Harmonic Rejection Through Non-Overlapped Clocking

A 350-MS/s Continuous-Time Delta–Sigma Modulator With a Digitally Assisted Binary-DAC and a 5-Bits Two-Step-ADC Quantizer in 130-nm CMOS

18-MHz Silicon Lamé Mode Resonators With Corner and Central Anchor Architectures in a Dual-Wafer SOI Technology

A 10-bit 110 kS/s 1.16 $\mu\hbox{W}$ SA-ADC With a Hybrid Differential/Single-Ended DAC in 180-nm CMOS for Multichannel Biomedical Applications

A 1-V 690 μW 8-bit 200 MS/s flash-SAR ADC with pipelined operation of flash and SAR ADCs in 0.13μm CMOS

A 10-Gb/s low-power low-voltage CTLE using gate and bulk driven transistors

65 nm CMOS switching discontinuous-conduction mode buck converter with 330 ns start-up time for light-load power-cycled applications

A 0.4V ultra low-power UWB CMOS LNA employing noise cancellation

A 350-MS/s Continuous-Time Delta–Sigma Modulator With a Digitally Assisted Binary-DAC and a 5-Bits Two-Step-ADC Quantizer in 130-nm CMOS