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RISSecure fault tolerance mechanism of wireless Ad-Hoc networks with mobile agents
A 14b 60 MS/s Pipelined ADC Adaptively Cancelling Opamp Gain and Nonlinearity
Design of Three-Stage Nested-Miller Compensated Operational Amplifiers Based on Settling Time
Settling performance of operational amplifiers (opamps) is of great importance in analog signal-processing applications. Among different architectures, three-stage amplifiers are gaining more attention between analog circuit designers of modern...
A new methode for optimization of analog integrated circuits using pareto-based multi-objective genetic algorithm
Abstract - In this work, we have applied two recent methods; the Discrete Wavelet Transform (DWT) and the Empirical Mode Decomposition (EMD) combined with the Hilbert transform, to the heart rate variability (HRV) considered ...
Modified model for settling behavior of operational amplifiers in nanoscale CMOS
An accurate time-domain model for the settling behavior of folded-cascode operational amplifiers is presented. Using a velocity–saturation model for MOS transistors makes the proposed model suitable for nanoscale CMOS ...
Design of low-power single-stage operational amplifiers based on an optimized settling model
Settling behavior of operational amplifiers (opamps) is important in many analog signal-processing applications. In this paper, the analysis of single-stage opamps based on settling time has been performed. A simple yet accurate model...
A 0.8-V 420nW CMOS switched-opamp switched-capacitor pacemaker front-end with a new continuous-time CMFB
A low-voltage low-power pacemaker Front-End for detecting QRS complex is presented in this paper. The circuit includes a switched-opamp switched-capacitor (SO-SC) preamplifier with a gain of 40db, a fourth-order Butterworth SO-SC filter with a...