Search

نمایش تعداد 1-6 از 6

On-chip magnetic thin-film noise suppressor for IC chip level digital noise countermeasure

نوع: Conference Paper

نویسنده : Yamaguchi, Masahiro; Endo, Yasushi; Tanaka, Satoshi; Ito, Tetsuo; Muroga, Sho; Azuma, Naoya; Nagata, Makoto

ناشر: IEEE

سال: 2014

Advanced techniques for integration of energy storage and photovoltaic generator in renewable energy systems

نوع: Conference Paper

نویسنده : Dwari, Suman; Arnedo, Luis; Blasko, Vladimir

ناشر: IEEE

سال: 2014

Effects of graphitic nanomaterials on the dissociation pathway of amyloidogenic peptide dimer

نوع: Conference Paper

نویسنده : Makarucha, A.J.; Todorova, N.; Yarovsky, I.

ناشر: IEEE

سال: 2014

An analytical model for transfer characteristics and sub-threshold swings in double-gate tunnel FETs

نوع: Conference Paper

نویسنده : Gholizadeh, Mahdi; Hosseini, Seyed Ebrahim

ناشر: IEEE

سال: 2014

Low-latency last-level cache structure based on grouped cores in Chip Multi-Processor

نوع: Conference Paper

نویسنده : Jinbo Xu; Weixia Xu; Kefei Wang; Zhengbin Pang

ناشر: IEEE

سال: 2014

Committees

نوع: Conference Paper

ناشر: IEEE

سال: 2014

Search

On-chip magnetic thin-film noise suppressor for IC chip level digital noise countermeasure

Advanced techniques for integration of energy storage and photovoltaic generator in renewable energy systems

Effects of graphitic nanomaterials on the dissociation pathway of amyloidogenic peptide dimer

An analytical model for transfer characteristics and sub-threshold swings in double-gate tunnel FETs

Low-latency last-level cache structure based on grouped cores in Chip Multi-Processor

Committees

نویسنده

ناشر

سال

کلیدواژه

نوع

زبان

نوع محتوا

عنوان ناشر

Search

Filters

On-chip magnetic thin-film noise suppressor for IC chip level digital noise countermeasure

Advanced techniques for integration of energy storage and photovoltaic generator in renewable energy systems

Effects of graphitic nanomaterials on the dissociation pathway of amyloidogenic peptide dimer

An analytical model for transfer characteristics and sub-threshold swings in double-gate tunnel FETs

Low-latency last-level cache structure based on grouped cores in Chip Multi-Processor

Committees