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    Low-latency last-level cache structure based on grouped cores in Chip Multi-Processor 

    Type: Conference Paper
    Author : Jinbo Xu; Weixia Xu; Kefei Wang; Zhengbin Pang
    Publisher: IEEE
    Year: 2014
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    Computer Engineering and Technology: 16th National Conference, NCCET 2012, Shanghai, China, August 17-19, 2012, Revised Selected Papers 

    Type: Ebook
    Author : Zhuo Ma; Zhenyu Zhao; Yang Guo; Lunguo Xie; Jinshan Yu (auth.); Weixia Xu; Liquan Xiao; Pingjing Lu; Jinwen Li; Chengyi Zhang (eds.)
    Publisher: Springer Berlin Heidelberg
    Year: 2013
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