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Network-on-Chip Architectures: A Holistic Design Exploration (Lecture Notes in Electrical Engineering Vol 45)

Type: Ebook

Author : Chrysostomos Nicopoulos; Vijaykrishnan Narayanan; Chita R. Das

Publisher: Springer

Year: 2009

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Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications

Type: Journal Paper

Author : Huichu Liu; Suman Datta; Vijaykrishnan Narayanan

Year: 2013

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Tunnel FET technology: A reliability perspective

Type: Journal Paper

Author : Suman Datta; Huichu Liu; Vijaykrishnan Narayanan

Year: 2014

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Network-on-Chip Architectures: A Holistic Design Exploration

Type: Ebook

Author : Chrysostomos Nicopoulos; Vijaykrishnan Narayanan; Chita R. Das (auth.)

Publisher: Springer Netherlands

Year: 2010

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An energy-efficient heterogeneous CMP based on hybrid TFET-CMOS cores

Type: Journal Paper

Author : Vinay Saripalli; Asit Mishra; Suman Datta; Vijaykrishnan Narayanan

Year: 2011

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Device-Circuit Analysis of Ferroelectric FETs for Low-Power Logic

Type: Journal Paper

Author : Shreya Gupta; Mark Steiner; Ahmedullah Aziz; Vijaykrishnan Narayanan; Suman Datta; Sumeet Kumar Gupta

Year: 2017

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Analysis of DIBL Effect and Negative Resistance Performance for NCFET Based on a Compact SPICE Model

Type: Journal Paper

Author : Yuhua Liang; Xueqing Li; Sumeet Kumar Gupta; Suman Datta; Vijaykrishnan Narayanan

Year: 2018

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Thermal-Aware Application Scheduling on Device-Heterogeneous Embedded Architectures

Type: Journal Paper

Author : Karthik Swaminathan; Jagadish Kotra; Huichu Liu; Jack Sampson; Mahmut Kandemir; Vijaykrishnan Narayanan

Year: 2015

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Comparing Energy, Area, Delay Tradeoffs in Going Vertical with CMOS and Asymmetric HTFETs

Type: Journal Paper

Author : Moon Seok Kim; William Cane-Wissing; Jack Sampson; Suman Datta; Vijaykrishnan Narayanan; Sumeet K. Gupta

Year: 2015

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Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs

Type: Journal Paper

Author : Reetuparna Das; Soumya Eachempati; Asit K. Mishra; Vijaykrishnan Narayanan; Chita R. Das

Year: 2009

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Network-on-Chip Architectures: A Holistic Design Exploration (Lecture Notes in Electrical Engineering Vol 45)

Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications

Tunnel FET technology: A reliability perspective

Network-on-Chip Architectures: A Holistic Design Exploration

An energy-efficient heterogeneous CMP based on hybrid TFET-CMOS cores

Device-Circuit Analysis of Ferroelectric FETs for Low-Power Logic

Analysis of DIBL Effect and Negative Resistance Performance for NCFET Based on a Compact SPICE Model

Thermal-Aware Application Scheduling on Device-Heterogeneous Embedded Architectures

Comparing Energy, Area, Delay Tradeoffs in Going Vertical with CMOS and Asymmetric HTFETs

Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs

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Network-on-Chip Architectures: A Holistic Design Exploration (Lecture Notes in Electrical Engineering Vol 45)

Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications

Tunnel FET technology: A reliability perspective

Network-on-Chip Architectures: A Holistic Design Exploration

An energy-efficient heterogeneous CMP based on hybrid TFET-CMOS cores

Device-Circuit Analysis of Ferroelectric FETs for Low-Power Logic

Analysis of DIBL Effect and Negative Resistance Performance for NCFET Based on a Compact SPICE Model

Thermal-Aware Application Scheduling on Device-Heterogeneous Embedded Architectures

Comparing Energy, Area, Delay Tradeoffs in Going Vertical with CMOS and Asymmetric HTFETs

Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs