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Now showing items 1-6 of 6

A Circuit Synthesis Flow for Controllable-Polarity Transistors

Type: Journal Paper

Author : Amaru, Luca; Gaillardon, Pierre-Emmanuel; De Micheli, G.

Publisher: IEEE

Year: 2014

Configurable Circuits Featuring Dual-Threshold-Voltage Design With Three-Independent-Gate Silicon Nanowire FETs

Type: Journal Paper

Author : Jian Zhang; Xifan Tang; Gaillardon, Pierre-Emmanuel; De Micheli, G.

Publisher: IEEE

Year: 2014

Polarity-Controllable Silicon Nanowire Transistors With Dual Threshold Voltages

Type: Journal Paper

Author : Jian Zhang; De Marchi, Michele; Sacchetto, Davide; Gaillardon, Pierre-Emmanuel; Leblebici, Yusuf; De Micheli, G.

Publisher: IEEE

Year: 2014

Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design

Type: Journal Paper

Author : Kazi, Ibrahim; Meinerzhagen, Pascal; Gaillardon, Pierre-Emmanuel; Sacchetto, Davide; Leblebici, Yusuf; Burg, Andreas; De Micheli, G.

Publisher: IEEE

Year: 2014

Top–Down Fabrication of Gate-All-Around Vertically Stacked Silicon Nanowire FETs With Controllable Polarity

Type: Journal Paper

Author : De Marchi, Michele; Sacchetto, Davide; Jian Zhang; Frache, Stefano; Gaillardon, Pierre-Emmanuel; Leblebici, Yusuf; De Micheli, G.

Publisher: IEEE

Year: 2014

Configurable Logic Gates Using Polarity-Controlled Silicon Nanowire Gate-All-Around FETs

Type: Journal Paper

Author : De Marchi, Michele; Jian Zhang; Frache, Stefano; Sacchetto, Davide; Gaillardon, Pierre-Emmanuel; Leblebici, Yusuf; De Micheli, G.

Publisher: IEEE

Year: 2014

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A Circuit Synthesis Flow for Controllable-Polarity Transistors

Configurable Circuits Featuring Dual-Threshold-Voltage Design With Three-Independent-Gate Silicon Nanowire FETs

Polarity-Controllable Silicon Nanowire Transistors With Dual Threshold Voltages

Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design

Top–Down Fabrication of Gate-All-Around Vertically Stacked Silicon Nanowire FETs With Controllable Polarity

Configurable Logic Gates Using Polarity-Controlled Silicon Nanowire Gate-All-Around FETs

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A Circuit Synthesis Flow for Controllable-Polarity Transistors

Configurable Circuits Featuring Dual-Threshold-Voltage Design With Three-Independent-Gate Silicon Nanowire FETs

Polarity-Controllable Silicon Nanowire Transistors With Dual Threshold Voltages

Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design

Top&#x2013;Down Fabrication of Gate-All-Around Vertically Stacked Silicon Nanowire FETs With Controllable Polarity

Configurable Logic Gates Using Polarity-Controlled Silicon Nanowire Gate-All-Around FETs

Top–Down Fabrication of Gate-All-Around Vertically Stacked Silicon Nanowire FETs With Controllable Polarity