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Analysis and Design of Ultra-Wideband Low-Noise Amplifier With Input/Output Bandwidth Optimization and Single-Ended/Differential-Input Reconfigurability

Type: Journal Paper

Author : Boyu Hu; Xiao Peng Yu; Wei Meng Lim; Kiat Seng Yeo

Publisher: IEEE

Year: 2014

DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers

Type: Journal Paper

Author : Zuow-Zun Chen; Yen-Cheng Kuan; Yilei Li; Boyu Hu; Chien-Heng Wong; Mau-Chung Frank Chang

Year: 2017

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A 16-Gb/s 14.7-mW Tri-Band Cognitive Serial Link Transmitter With Forwarded Clock to Enable PAM-16/256-QAM and Channel Response Detection

Type: Journal Paper

Author : Yuan Du; Wei-Han Cho; Po-Tsang Huang; Yilei Li; Chien-Heng Wong; Jieqiong Du; Yanghyo Kim; Boyu Hu; Li Du; Chunchen Liu; Sheau Jiung Lee; Mau-Chung Frank Chang

Year: 2017

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Analysis and Design of Ultra-Wideband Low-Noise Amplifier With Input/Output Bandwidth Optimization and Single-Ended/Differential-Input Reconfigurability

DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers

A 16-Gb/s 14.7-mW Tri-Band Cognitive Serial Link Transmitter With Forwarded Clock to Enable PAM-16/256-QAM and Channel Response Detection

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Analysis and Design of Ultra-Wideband Low-Noise Amplifier With Input/Output Bandwidth Optimization and Single-Ended/Differential-Input Reconfigurability

DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers

A 16-Gb/s 14.7-mW Tri-Band Cognitive Serial Link Transmitter With Forwarded Clock to Enable PAM-16/256-QAM and Channel Response Detection