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A novel adaptive fault tolerant flip-flop architecture based on TMR

Type: Conference Paper

Author : Cassano, L. , Bosio, A. , Di Natale, G.

Publisher: IEEE

Year: 2014

[IEEE 2012 17th IEEE European Test Symposium (ETS) - Annecy, France (2012.05.28-2012.05.31)] 2012 17TH IEEE EUROPEAN TEST SYMPOSIUM (ETS) - Through-Silicon-Via resistive-open defect analysis

Type: Journal Paper

Author : Metzler, C.; Todri, A.; Bosio, A.; Dilillo, L.; Girard, P.; Virazel, A.

Year: 2012

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[IEEE 2008 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTVS) - Cambridge, MA, USA (2008.10.1-2008.10.3)] 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems - Using TMR Architectures for Yield Improvement

Type: Journal Paper

Author : Vial, J.; Bosio, A.; Girard, P.; Landrault, C.; Pravossoudovitch, S.; Virazel, A.

Year: 2008

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Globally Constrained Locally Optimized 3-D Power Delivery Networks

Type: Journal Paper

Author : Todri-Sanial, Aida; Kundu, Sandipan; Girard, P.; Bosio, A.; Dilillo, L.; Virazel, A.

Publisher: IEEE

Year: 2014

Dynamic Compact Model of Self-Referenced Magnetic Tunnel Junction

Type: Journal Paper

Author : Azevedo, Joao; Virazel, A.; Bosio, A.; Dilillo, L.; Girard, P.; Alvarez-Herault, Jeremy; Mackay, Ken

Publisher: IEEE

Year: 2014

A Complete Resistive-Open Defect Analysis for Thermally Assisted Switching MRAMs

Type: Journal Paper

Author : Azevedo, Joao; Virazel, A.; Bosio, A.; Dilillo, L.; Girard, P.; Todri-Sanial, Aida; Alvarez-Herault, Jeremy; Mackay, Ken

Publisher: IEEE

Year: 2014

90 nm SRAM Static and Dynamic Mode Real-Time Testing at Concordia Station in Antarctica

Type: Journal Paper

Author : Tsiligiannis, G.; Dilillo, L.; Bosio, A.; Girard, P.; Pravossoudovitch, S.; Virazel, A.; Cocquerez, P.; Autran, J.L.; Litterio, A.; Wrobel, F.; Saigne, F.

Publisher: IEEE

Year: 2014

Dynamic Test Methods for COTS SRAMs

Type: Journal Paper

Author : Tsiligiannis, G.; Dilillo, L.; Gupta, V.; Bosio, A.; Girard, P.; Virazel, A.; Puchner, H.; Bosser, Alexandre; Javanainen, Arto; Virtanen, Ari; Frost, Christopher; Wrobel, F.; Dusseau, L.; Saigne, F.

Publisher: IEEE

Year: 2014

An SRAM Based Monitor for Mixed-Field Radiation Environments

Type: Journal Paper

Author : Tsiligiannis, G.; Dilillo, L.; Bosio, A.; Girard, P.; Pravossoudovitch, S.; Todri, A.; Virazel, A.; Mekki, J.; Brugger, M.; Wrobel, F.; Saigné , Fré dé ric

Publisher: IEEE

Year: 2014

Multiple Cell Upset Classification<newline/> in Commercial SRAMs

Type: Journal Paper

Author : Tsiligiannis, G.; Dilillo, L.; Bosio, A.; Girard, P.; Pravossoudovitch, S.; Todri, A.; Virazel, A.; Puchner, H.; Frost, Christopher; Wrobel, F.; Saigné , Fré dé ric

Publisher: IEEE

Year: 2014

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A novel adaptive fault tolerant flip-flop architecture based on TMR

[IEEE 2012 17th IEEE European Test Symposium (ETS) - Annecy, France (2012.05.28-2012.05.31)] 2012 17TH IEEE EUROPEAN TEST SYMPOSIUM (ETS) - Through-Silicon-Via resistive-open defect analysis

[IEEE 2008 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTVS) - Cambridge, MA, USA (2008.10.1-2008.10.3)] 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems - Using TMR Architectures for Yield Improvement

Globally Constrained Locally Optimized 3-D Power Delivery Networks

Dynamic Compact Model of Self-Referenced Magnetic Tunnel Junction

A Complete Resistive-Open Defect Analysis for Thermally Assisted Switching MRAMs

90 nm SRAM Static and Dynamic Mode Real-Time Testing at Concordia Station in Antarctica

Dynamic Test Methods for COTS SRAMs

An SRAM Based Monitor for Mixed-Field Radiation Environments

Multiple Cell Upset Classification<newline/> in Commercial SRAMs

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A novel adaptive fault tolerant flip-flop architecture based on TMR

[IEEE 2012 17th IEEE European Test Symposium (ETS) - Annecy, France (2012.05.28-2012.05.31)] 2012 17TH IEEE EUROPEAN TEST SYMPOSIUM (ETS) - Through-Silicon-Via resistive-open defect analysis

[IEEE 2008 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTVS) - Cambridge, MA, USA (2008.10.1-2008.10.3)] 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems - Using TMR Architectures for Yield Improvement

Globally Constrained Locally Optimized 3-D Power Delivery Networks

Dynamic Compact Model of Self-Referenced Magnetic Tunnel Junction

A Complete Resistive-Open Defect Analysis for Thermally Assisted Switching MRAMs

90&#x00A0;nm SRAM Static and Dynamic Mode Real-Time Testing at Concordia Station in Antarctica

Dynamic Test Methods for COTS SRAMs

An SRAM Based Monitor for Mixed-Field Radiation Environments

Multiple Cell Upset Classification<newline/> in Commercial SRAMs

90 nm SRAM Static and Dynamic Mode Real-Time Testing at Concordia Station in Antarctica