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A Constrained Layout Placement Approach to Enhance Pulse Quenching Effect in Large Combinational Circuits
Publisher: IEEE
Year: 2014
Calculating the Soft Error Vulnerabilities of Combinational Circuits by Re-Considering the Sensitive Area
Publisher: IEEE
Year: 2014
Single-Event Pulse Broadening After Narrowing Effect in Nano-CMOS Logic Circuits
Publisher: IEEE
Year: 2014