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Now showing items 1-10 of 11

MEMS for wireless communications: Â from RF-MEMS components to RF-MEMS-SiPÂ

Type: Journal Paper

Author : Tilmans, Harrie A C; Raedt, Walter De; Beyne, Eric

Year: 2003

System Level Comparison of 3D Integration Technologies for Future Mobile MPSoC Platform

Type: Journal Paper

Author : Agrawal, Pulin; Milojevic, Dragomir; Raghavan, Praveen; Catthoor, Francky; Van der Perre, Liesbet; Beyne, Eric; Varadarajan, Ravi

Publisher: IEEE

Year: 2014

Metrology and Inspection Requirements for Successful Stacking of Integrated Circuits

Type: Journal Paper

Author : Halder, Sebastian; Miller, Alice; Van Puymbroeck, Jan; Nieuborg, Nancy; Beyne, Eric

Publisher: IEEE

Year: 2014

A study on power integrity in a 3D chip stack using dynamic power supply current emulation and power noise monitoring

Type: Conference Paper

Author : Araga, Yuuki; Miura, Ranto; Nagata, Makoto; Neve, Cesar Roda; De Vos, Joeri; Van der Plas, Geert; Beyne, Eric

Publisher: IEEE

Year: 2014

Development of underfilling and thermo-compression bonding processes for stacking multi-layer 3D ICs

Type: Conference Paper

Author : Wang, Teng; Daily, Robert; Capuz, Giovanni; Gerets, Carine; Rebibis, Kenneth June; Miller, Andy; Beyer, Gerald; Beyne, Eric

Publisher: IEEE

Year: 2014

W2W permanent stacking for 3D system integration

Type: Conference Paper

Author : Peng, Lan; Kim, Soon-Wook; Soules, Michael; Gabriel, Markus; Zoberbier, Margarete; Sleeckx, Erik; Struyf, Herbert; Miller, Andy; Beyne, Eric

Publisher: IEEE

Year: 2014

Cost components for 3D system integration

Type: Conference Paper

Author : Velenis, Dimitrios; Detalle, Mikael; Van Huylenbroeck, Stefaan; Jourdain, Anne; Phommahaxay, Alain; Slabbekoorn, John; Wang, Teng; Marinissen, Erik Jan; Rebibis, Kenneth June; Miller, Andy; Beyer, Gerald; Beyne, Eric

Publisher: IEEE

Year: 2014

Room temperature and zero pressure high quality oxide direct bonding for 3D self-aligned assembly

Type: Conference Paper

Author : Dubey, Vikas; Van Huylenbroeck, Stefaan; Tutunjyan, Nina; Slabbekoorn, John; De Wolf, Ingrid; Rebibis, Kenneth June; Miller, Andy; Celis, Jean Pierre; Croes, Kristof; Beyne, Eric

Publisher: IEEE

Year: 2014

Picking large thinned dies with high topography on both sides

Type: Conference Paper

Author : Gerets, Carine; Derakhshandeh, Jaber; Wang, Teng; Capuz, Giovanni; Podpod, Arnita; Demeurisse, Caroline; Rebibis, Kenneth June; Miller, Andy; Beyer, Gerald; Beyne, Eric

Publisher: IEEE

Year: 2014

Measurements and Analysis of Substrate Noise Coupling in TSV-Based 3-D Integrated Circuits

Type: Journal Paper

Author : Araga, Yuuki; Nagata, M.; Van der Plas, G.; Marchal, P.; Libois, M.; La Manna, A.; Wenqi Zhang; Beyer, G.; Beyne, Eric

Publisher: IEEE

Year: 2014

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MEMS for wireless communications: Â from RF-MEMS components to RF-MEMS-SiPÂ

System Level Comparison of 3D Integration Technologies for Future Mobile MPSoC Platform

Metrology and Inspection Requirements for Successful Stacking of Integrated Circuits

A study on power integrity in a 3D chip stack using dynamic power supply current emulation and power noise monitoring

Development of underfilling and thermo-compression bonding processes for stacking multi-layer 3D ICs

W2W permanent stacking for 3D system integration

Cost components for 3D system integration

Room temperature and zero pressure high quality oxide direct bonding for 3D self-aligned assembly

Picking large thinned dies with high topography on both sides

Measurements and Analysis of Substrate Noise Coupling in TSV-Based 3-D Integrated Circuits

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MEMS for wireless communications: Â from RF-MEMS components to RF-MEMS-SiPÂ

System Level Comparison of 3D Integration Technologies for Future Mobile MPSoC Platform

Metrology and Inspection Requirements for Successful Stacking of Integrated Circuits

A study on power integrity in a 3D chip stack using dynamic power supply current emulation and power noise monitoring

Development of underfilling and thermo-compression bonding processes for stacking multi-layer 3D ICs

W2W permanent stacking for 3D system integration

Cost components for 3D system integration

Room temperature and zero pressure high quality oxide direct bonding for 3D self-aligned assembly

Picking large thinned dies with high topography on both sides

Measurements and Analysis of Substrate Noise Coupling in TSV-Based 3-D Integrated Circuits