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Achievable rates and forward-backward decoding algorithms for the Gaussian relay channels under the one-code constraint

Type: Conference Paper

Author : Xiujie Huang , Haiqiang Chen , Xiao Ma

Publisher: IEEE

Year: 2014

DECO: DIMM controller efficient for ECC operations

Type: Journal Paper

Author : Wooyoung Jang

Publisher: IET

Year: 2014

Modeling the transport of drilling muds: Comparison of bblt and ParTrack models

Type: Conference Paper

Author : Niu, Haibo; Drozdowski, Adam

Publisher: IEEE

Year: 2014

CLOCK-DWF: A Write-History-Aware Page Replacement Algorithm for Hybrid PCM and DRAM Memory Architectures

Type: Journal Paper

Author : Soyoon Lee; Hyokyung Bahn; Noh, Sam H.

Publisher: IEEE

Year: 2014

AWARE (Asymmetric Write Architecture With REdundant Blocks): A High Write Speed STT-MRAM Cache Architecture

Type: Journal Paper

Author : Kon-Woo Kwon; Choday, Sri Harsha; Yusung Kim; Roy, Kaushik

Publisher: IEEE

Year: 2014

A Unified Write Buffer Cache Management Scheme for Flash Memory

Type: Journal Paper

Author : Liang Shi; Jianhua Li; Qingan Li; Xue, Chun Jason; Chengmo Yang; Xuehai Zhou

Publisher: IEEE

Year: 2014

A Complete Resistive-Open Defect Analysis for Thermally Assisted Switching MRAMs

Type: Journal Paper

Author : Azevedo, Joao; Virazel, A.; Bosio, A.; Dilillo, L.; Girard, P.; Todri-Sanial, Aida; Alvarez-Herault, Jeremy; Mackay, Ken

Publisher: IEEE

Year: 2014

Error Model Guided Joint Performance and Endurance Optimization for Flash Memory

Type: Journal Paper

Author : Liang Shi; Keni Qiu; Mengying Zhao; Xue, Chun Jason

Publisher: IEEE

Year: 2014

Performance optimization of PVM based parallel applications using optimal number of slaves

Type: Conference Paper

Publisher: IEEE

Year: 2014

Semidefinite relaxations for stochastic optimal control policies

Type: Conference Paper

Author : Horowitz, M.B. , Burdick, J.W.

Publisher: IEEE

Year: 2014

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Achievable rates and forward-backward decoding algorithms for the Gaussian relay channels under the one-code constraint

DECO: DIMM controller efficient for ECC operations

Modeling the transport of drilling muds: Comparison of bblt and ParTrack models

CLOCK-DWF: A Write-History-Aware Page Replacement Algorithm for Hybrid PCM and DRAM Memory Architectures

AWARE (Asymmetric Write Architecture With REdundant Blocks): A High Write Speed STT-MRAM Cache Architecture

A Unified Write Buffer Cache Management Scheme for Flash Memory

A Complete Resistive-Open Defect Analysis for Thermally Assisted Switching MRAMs

Error Model Guided Joint Performance and Endurance Optimization for Flash Memory

Performance optimization of PVM based parallel applications using optimal number of slaves

Semidefinite relaxations for stochastic optimal control policies

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Achievable rates and forward-backward decoding algorithms for the Gaussian relay channels under the one-code constraint

DECO: DIMM controller efficient for ECC operations

Modeling the transport of drilling muds: Comparison of bblt and ParTrack models

CLOCK-DWF: A Write-History-Aware Page Replacement Algorithm for Hybrid PCM and DRAM Memory Architectures

AWARE (Asymmetric Write Architecture With REdundant Blocks): A High Write Speed STT-MRAM Cache Architecture

A Unified Write Buffer Cache Management Scheme for Flash Memory

A Complete Resistive-Open Defect Analysis for Thermally Assisted Switching MRAMs

Error Model Guided Joint Performance and Endurance Optimization for Flash Memory

Performance optimization of PVM based parallel applications using optimal number of slaves

Semidefinite relaxations for stochastic optimal control policies