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RISA Reconfigurable and Power-Scalable 10-12 bit 0.4-44 MS/s Pipelined ADC with 0.35-0.5 pJ/step in 1.2 V 90 nm Digital CMOS
Year: 2013
Abstract:
A pipelined ADC, reconfigurable over bandwidths of 0.2-22 MHz (sampling frequencies of 0.4-44 MS/s) and resolutions of 10-12 bits, is described for applications in multi-standard wireless terminals. Fabricated in a 1.2-V ...
A 3–25 Gb/s Four-Channel Receiver With Noise-Canceling TIA and Power-Scalable LA
Publisher: IEEE
Year: 2014
An efficient reliable PUF-based cryptographic key generator in 65nm CMOS
Publisher: IEEE
Year: 2014
Investigation on Power Scalability of Diffraction-Limited Yb-Doped Fiber Lasers
Publisher: IEEE
Year: 2014
A Power-Scalable DCO for Multi-Standard GSM/WCDMA Frequency Synthesizers
Publisher: IEEE
Year: 2014