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A Fine-Grained Clock Buffer Polarity Assignment for High-Speed and Low-Power Digital Systems

Type: Journal Paper

Author : Deokjin Joo; Taewhan Kim

Publisher: IEEE

Year: 2014

Introduction to design considerations of DRAM memory controllers

Type: Conference Paper

Publisher: IEEE

Year: 2014

Author

Deokjin Joo (1)

Taewhan Kim (1)

Publisher

IEEE (2)

Year

2014 (2)

Keywords

benchmark circuits (1)

buffer circuits (1)

circuit reliability (1)

circuit speed (1)

clock signal propagation (1)

clock skew violation (1)

clocks (1)

CMOS memory circuits (1)

current fluctuation (1)

current fluctuations (1)

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Conference Paper (1)

Journal Paper (1)

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English (2)

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Metadata Only (2)

Publication Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on (1)

ustom Integrated Circuits Conference (CICC), 2014 IEEE Proceedings of the (1)

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