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    Comparative Study of FinFETs versus 22nm Bulk CMOS technologies: SRAM Design Perspective 

    Type: Conference Paper
    Author : هومان فرخانی; علی پیروی; Jens Madsen Kargaard; Farshad Moradi; HOOMAN FARKHANI; Ali Peiravi
    Year: 2014
    Abstract:

    with the effect of device

    parameters on their characteristics are explored. Both FinFET

    and CMOS devices are used in 6T and 8T-SRAM cells.

    Simulation results show significant improvements for FinFETbased

    SRAMs compared to bulk CMOS...

    Joint detection and recognition of human actions in wireless surveillance camera networks 

    Type: Conference Paper
    Author : Naikal, N. , Lajevardi, P. , Sastry, S.S.
    Publisher: IEEE
    Year: 2014

    A Novel Soft Error Hardened 14T SRAM Cell 

    Type: Conference Paper
    Author : LEILA, MORAD; JAVAD, JAVIDAN; GHOLAMREZA, ZARE FATIN; EHSAN, MORAD
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    Dual focus polarisation lens: Theory 

    Type: Conference Paper
    Publisher: IEEE
    Year: 2014

    Combining Decomposition and Lumping to Evaluate Semi-hierarchical Systems 

    Type: Conference Paper
    Author : Mü llner, N. , Theel, O. , Frä nzle, M.
    Publisher: IEEE
    Year: 2014

    Mobile Simulator for Risk Analysis 

    Type: Conference Paper
    Publisher: IEEE
    Year: 2014

    On the capacity of full-duplex causal cognitive interference channels to within a constant gap 

    Type: Conference Paper
    Publisher: IEEE
    Year: 2014

    Applying the Prometheus Methodology for an Internet of Things Architecture 

    Type: Conference Paper
    Author : Manate, Bogdan; Fortis, Florin; Moore, Philip
    Publisher: IEEE
    Year: 2014

    LDACS1-based non-cooperative surveillance 

    Type: Conference Paper
    Author : Filip, A. , Shutin, D. , Schnell, M.
    Publisher: IEEE
    Year: 2014

    A New Write Assist Technique for SRAM Design in 65nm CMOS Technology 

    Type: Journal Paper
    Author : هومان فرخانی; علی پیروی; Farshad Moradi; HOOMAN FARKHANI; Ali Peiravi
    Year: 2015
    Abstract:

    in this paper, a new write assist technique for SRAM arrays is proposed. In this technique, to improve the

    write features of the SRAM cell, a negative voltage is applied to one of the bitlines in the SRAM cell while

    another bitline...

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