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14.3 A Push-Pull mm-Wave power amplifier with <0.8° AM-PM distortion in 40nm CMOS

Type: Conference Paper

Author : Kulkarni, S. , Reynaert, P.

Publisher: IEEE

Year: 2014

9.1 A self-calibrating NFC SoC with a triple-mode reconfigurable PLL and a single-path PICC-PCD receiver in 0.11μm CMOS

Type: Conference Paper

Publisher: IEEE

Year: 2014

10.8 A multi-standard 2G/3G/4G Cellular modem supporting carrier aggregation in 28nm CMOS

Type: Conference Paper

Publisher: IEEE

Year: 2014

Design of disaster alerting functionality for digital signage service

Type: Conference Paper

Publisher: IEEE

Year: 2014

Spammer Classification Using Ensemble Methods over Structural Social Network Features

Type: Conference Paper

Author : Bhat, S.Y.; Abulaish, M.; Mirza, A.A.

Publisher: IEEE

Year: 2014

Discrete-time polynomial fuzzy observer designs via a sum of squares approach

Type: Conference Paper

Publisher: IEEE

Year: 2014

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14.3 A Push-Pull mm-Wave power amplifier with <0.8° AM-PM distortion in 40nm CMOS

9.1 A self-calibrating NFC SoC with a triple-mode reconfigurable PLL and a single-path PICC-PCD receiver in 0.11μm CMOS

10.8 A multi-standard 2G/3G/4G Cellular modem supporting carrier aggregation in 28nm CMOS

Design of disaster alerting functionality for digital signage service

Spammer Classification Using Ensemble Methods over Structural Social Network Features

Discrete-time polynomial fuzzy observer designs via a sum of squares approach

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14.3 A Push-Pull mm-Wave power amplifier with &#x003C;0.8&#x00B0; AM-PM distortion in 40nm CMOS

9.1 A self-calibrating NFC SoC with a triple-mode reconfigurable PLL and a single-path PICC-PCD receiver in 0.11&#x03BC;m CMOS

10.8 A multi-standard 2G/3G/4G Cellular modem supporting carrier aggregation in 28nm CMOS

Design of disaster alerting functionality for digital signage service

Spammer Classification Using Ensemble Methods over Structural Social Network Features

Discrete-time polynomial fuzzy observer designs via a sum of squares approach

14.3 A Push-Pull mm-Wave power amplifier with <0.8° AM-PM distortion in 40nm CMOS

9.1 A self-calibrating NFC SoC with a triple-mode reconfigurable PLL and a single-path PICC-PCD receiver in 0.11μm CMOS