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Implementation of Decoders for LDPC Block Codes and LDPC Convolutional Codes Based on GPUs

contributor authorYue Zhao
contributor authorLau, Francis C. M.
date accessioned2020-03-12T18:21:50Z
date available2020-03-12T18:21:50Z
date issued2014
identifier issn1045-9219
identifier other6470607.pdf
identifier urihttp://libsearch.um.ac.ir:80/fum/handle/fum/955966?locale-attribute=en&show=full
formatgeneral
languageEnglish
publisherIEEE
titleImplementation of Decoders for LDPC Block Codes and LDPC Convolutional Codes Based on GPUs
typeJournal Paper
contenttypeMetadata Only
identifier padid7987818
subject keywordsblock codes
subject keywordscodecs
subject keywordsconvolutional codes
subject keywordsdata structures
subject keywordsdecoding
subject keywordsgraphics processing units
subject keywordsparity check codes
subject keywordsGPU
subject keywordsLDPC block-code decoders/simulators
subject keywordsLDPC convolutional code decoder
subject keywordsLDPCCC decoder
subject keywordsTanner graph
subject keywordsdata structures
subject keywordsdecoding process
subject keywordsgraphics processing units
subject keywordsquasi-cyclic LDPC block code
subject keywordsquasicyclic structure
subject keywordsread and write processes
subject keywordsBlock codes
subject keywordsConvolutional codes
subject keywordsDecoding
subject keywordsGraphics processing units
subject keywordsIterative decoding
subject keywordsMessage systems
subject keywordsCUDA
subject keywordsLDPC
subject keywordsLDPC convolutional
identifier doi10.1109/TPDS.2013.52
journal titleParallel and Distributed Systems, IEEE Transactions on
journal volume25
journal issue3
filesize904211
citations0


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