An Algorithm for Synthesis of Reversible Logic Circuits
سال
: 2006شناسه الکترونیک: 10.1109/tcad.2006.871622
کالکشن
:
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آمار بازدید
An Algorithm for Synthesis of Reversible Logic Circuits
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| contributor author | Gupta, P. | |
| contributor author | Agrawal, A. | |
| contributor author | Jha, N.K. | |
| date accessioned | 2020-03-15T02:25:37Z | |
| date available | 2020-03-15T02:25:37Z | |
| date issued | 2006 | |
| identifier other | lDULi0h8OOilAG7Cw8AESee5qMn1vWmxhN9E0l4DJOXFJSZFDa.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1816590 | |
| format | general | |
| language | English | |
| title | An Algorithm for Synthesis of Reversible Logic Circuits | |
| type | Journal Paper | |
| contenttype | Fulltext | |
| contenttype | Fulltext | |
| identifier padid | 12877689 | |
| identifier doi | 10.1109/tcad.2006.871622 | |
| coverage | Academic | |
| pages | 0-2330 | |
| journal volume | 25 | |
| journal issue | 11 | |
| filesize | 550154 | |
| citations | 0 |